Patents by Inventor Yvon Chen

Yvon Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7117587
    Abstract: A method for fabricating a substrate, which includes a plurality of chip package substrates. One combined PCB includes a multi-layer rigid PCB and a soft PCB. The multi-layer rigid PCB is fixed on the soft PCB. At least one grooves or a pair is formed on an upper surface of the multi-layer rigid PCB. A portion of the multi-layer rigid PCB between the grooves is milled to expose a corresponding portion of the soft PCB to define an exposed area. The combined PCB is drilled through along two opposite sides of the grooves and the corresponding exposed area of the soft PCB. Breakable parts are formed at a center of the corresponding portion of the soft PCB and two opposite outside edges of the grooves.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: October 10, 2006
    Assignee: Lite-On Semiconductor Corp.
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen
  • Patent number: 7075176
    Abstract: A chip package substrate having a soft circuit board jas a multi-layer soft and hard composite PCB, a plurality of conducting components and a plurality of conducting holes. The conducting holes are formed in the multi-layer soft and hard composite PCB. The conducting components are electroplated on the inner edges of the conducting holes on the multi-layer soft and hard composite PCB. An image-sensing chip can thus be packaged on the chip package substrate with the soft circuit board used as external signal connection lines, thereby saving the manufacturing cost and increasing the yield thereof.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: July 11, 2006
    Assignee: Lite-On Semiconductor Corp.
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen
  • Publication number: 20060006487
    Abstract: A chip package substrate having a soft circuit board jas a multi-layer soft and hard composite PCB, a plurality of conducting components and a plurality of conducting holes. The conducting holes are formed in the multi-layer soft and hard composite PCB. The conducting components are electroplated on the inner edges of the conducting holes on the multi-layer soft and hard composite PCB. An image-sensing chip can thus be packaged on the chip package substrate with the soft circuit board used as external signal connection lines, thereby saving the manufacturing cost and increasing the yield thereof.
    Type: Application
    Filed: July 26, 2005
    Publication date: January 12, 2006
    Applicant: LITE-ON SEMICONDUCTOR CORP.
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen
  • Publication number: 20050001278
    Abstract: A chip package substrate having a soft circuit board jas a multi-layer soft and hard composite PCB, a plurality of conducting components and a plurality of conducting holes. The conducting holes are formed in the multi-layer soft and hard composite PCB. The conducting components are electroplated on the inner edges of the conducting holes on the multi-layer soft and hard composite PCB. An image-sensing chip can thus be packaged on the chip package substrate with the soft circuit board used as external signal connection lines, thereby saving the manufacturing cost and increasing the yield thereof.
    Type: Application
    Filed: September 5, 2003
    Publication date: January 6, 2005
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen