Abstract: A file, including visual information or auditory information may be uploaded to a processing device. Respective portions of content of the file may be identified for compressing and saving at respective bit rates. A number of component files may be created, compressed and saved, at the respective bit rates, based on the identified respective portions of content of the file. A network page, including a reference to the uploaded file, may be created. The reference to the uploaded file, in the network page, may be replaced with references to the compressed, saved component files and the network page may be saved. A processing device of a user may request the network page and the compressed, saved component files. A reasonable facsimile of the file may be reproduced based on an aggregate of the compressed, saved component files.

Abstract: A computer implemented method of verifying events generated by an agent includes detecting an input signal at an input of the agent, generating an expected output signal based at least in part on the input signal, detecting an output signal at an output of the agent, wherein the output signal is a translation of the input signal generated by the agent, and comparing the output signal with the expected output signal to verify whether the agent produced the output signal correctly based on the input signal.

Abstract: A simulator facilitates virtual welding activity of pipe and open root weld joints. The simulator may include a logic processor based system operable to execute coded instructions for generating an interactive welding environment that emulates welding activity on a section of virtual pipe having at least one virtual weld joint. It also includes a display connected to the logic processor based system for visually depicting the interactive welding environment, wherein the display depicts the section of virtual pipe. A mock welding tool is provided for performing virtual welding activity on the at least one weld joint in real time where one or more sensors are adapted to track movement of the input device in real time for communicating data about the movement of the input device to the logic processor based system.

Abstract: A real-time virtual reality welding system including a programmable processor-based subsystem, a spatial tracker operatively connected to the programmable processor-based subsystem, at least one mock welding tool capable of being spatially tracked by the spatial tracker, and at least one display device operatively connected to the programmable processor-based subsystem. The system is capable of simulating, in virtual reality space, a weld puddle having real-time molten metal fluidity and heat dissipation characteristics. The system is further capable of displaying the simulated weld puddle on the display device in real-time.

Abstract: A file, including visual information or auditory information may be uploaded to a processing device. Respective portions of content of the file may be identified for compressing and saving at respective bit rates. A number of component files may be created, compressed and saved, at the respective bit rates, based on the identified respective portions of content of the file. A network page, including a reference to the uploaded file, may be created. The reference to the uploaded file, in the network page, may be replaced with references to the compressed, saved component files and the network page may be saved. A processing device of a user may request the network page and the compressed, saved component files. A reasonable facsimile of the file may be reproduced based on an aggregate of the compressed, saved component files.

Abstract: A computer implemented method of verifying events generated by an agent includes detecting a stimulus at an input of the agent and determining whether generation of an event by the agent in response to the stimulus is conditional. An expectation of the event is created based at least in part on the stimulus, wherein the agent is expected to generate the event. The method also includes making the expectation speculative if the generation of the event is conditional.

Abstract: In one embodiment, a system and method for identifying incomplete transactions includes identifying termination of a test case run on a processor verification system, examining a pending transaction list to identify incomplete transactions, and examining at least one forward progress vector to identify incomplete transactions.

Abstract: Disclosed are systems and methods for identifying erroneous transactions. In one embodiment, a system and a method pertain to monitoring an interface, determining information related to termination of a test case, and after the test case has terminated, identifying an incomplete transaction that should have completed prior to termination of the test case.

Abstract: In one embodiment, a system and method pertain to identifying an output signal having indeterminate timing, creating an expectation for a signal change associated with the output signal, and adding the expectation to an ordered list of expectations for the output signal. In another embodiment, a system and method pertain to detecting a signal change, identifying a vector associated with the signal in which the change occurred, examining pending expectations of the vector until a mature expectation is identified, comparing an expected value contained in the mature expectation with the detected signal change, and reporting an error if the expected value does not match the detected signal change.

Abstract: Systems, methodologies, media, and other embodiments associated with a system for producing a bus-type header-type field from a point-to-point data-type field are described. One exemplary system embodiment includes a logic configured to identify that a point-to-point transaction includes non-memory-data information encoded in a data flit, a logic configured to extract the non-memory-data information from the data flit, and a logic configured to produce a header-type field for a bus-type transaction produced by the virtual bus interface from the point-to-point transaction.

Abstract: Systems, methods and software products are provided for transaction logging and intelligent error reporting in an expectation-based memory agent checker. Simulation status information is appended to one or more transaction log messages generated by the expectation-based memory agent checker. A cause of error indicated by mismatch between simulated output transaction events and expected output transaction events is determined. Information about the error is appended to one or more error messages generated by the expectation-based memory agent checker.

Abstract: Techniques are disclosed for automatically generating test instructions for use in testing a microprocessor design. A configuration file includes a plurality of knobs which specify a probability distribution of a plurality of microprocessor instructions. A random code generator takes the configuration file as an input and generates test instructions which are distributed according to the probability distribution specified by the knobs. The test instructions are executed on the microprocessor design. The microprocessor behaviors that are exercised by the test instructions are measured and a fitness value is assigned to the configuration file using a fitness function. The configuration file and its fitness value are added to a pool of configuration files. A configuration file synthesizer uses a genetic algorithm to synthesize a new configuration file from the pool of existing configuration files.

Abstract: Techniques are disclosed for automatically generating test instructions for use in testing a microprocessor design. A configuration file includes a plurality of knobs which specify a probability distribution of a plurality of microprocessor instructions. A random code generator takes the configuration file as an input and generates test instructions which are distributed according to the probability distribution specified by the knobs. The test instructions are executed on the microprocessor design. The microprocessor behaviors that are exercised by the test instructions are measured and a fitness value is assigned to the configuration file using a fitness function. The configuration file and its fitness value are added to a pool of configuration files. A configuration file synthesizer uses a genetic algorithm to synthesize a new configuration file from the pool of existing configuration files.