Patents by Inventor Zadig Lam

Zadig Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device with dual gate oxides
    Patent number: 7259071
    Abstract: A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: August 21, 2007
    Assignee: SilTerra Malaysia Sdn.Bhd.
    Inventors: Inki Kim, Sang Yeon Kim, Min Paek, Chiew Sin Ping, Wan Gie Lee, Choong Shiau Chien, Zadig Lam, Hitomi Watanabe, Naoto Inoue
  • Semiconductor device with dual gate oxides
    Publication number: 20050059215
    Abstract: A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact.
    Type: Application
    Filed: October 25, 2004
    Publication date: March 17, 2005
    Applicant: SilTerra Malaysia Sdn. Bhd.
    Inventors: Inki Kim, Sang Kim, Min Paek, Chiew Ping, Wan Lee, Choong Chien, Zadig Lam, Hitomi Watanabe, Naoto Inoue
  • Dual phase grating alignment marks
    Patent number: 6864956
    Abstract: A method for aligning a substrate on a lithographic apparatus includes providing a substrate having a first plurality of grating marks optimized for a beam of a first given diffraction order and a second plurality of grating marks optimized for a beam of a second given diffraction order on a lithographic apparatus. A first signal is generated using a first beam reflected from the first grating marks, the first beam being a beam of the first given diffraction order. A second signal is generated using a second beam reflected from the second grating marks, the second beam being a beam of the second given diffraction order. The substrate is aligned with respect to the apparatus using the first and second signals.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: March 8, 2005
    Assignee: SilTerra Malaysia Sdn. Bhd.
    Inventors: Lim Chin Teong, Li Kuo Wei, Jeong Soo Kim, Zadig Lam
  • Semiconductor device with dual gate oxides
    Patent number: 6818514
    Abstract: A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: November 16, 2004
    Assignee: SilTerra Malaysia Sdn. Bhd.
    Inventors: Inki Kim, Sang Yeon Kim, Min Paek, Chiew Sin Ping, Wan Gie Lee, Choong Shiau Chien, Zadig Lam, Hitomi Watanabe, Naoto Inoue
  • Semiconductor device with dual gate oxides
    Publication number: 20040166698
    Abstract: A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact.
    Type: Application
    Filed: February 26, 2003
    Publication date: August 26, 2004
    Applicant: SilTerra Malaysia Sdn. Bhd.
    Inventors: Inki Kim, Sang Yeon Kim, Min Paek, Chiew Sin Ping, Wan Gie Lee, Choong Shiau Chien, Zadig Lam, Hitomi Watanabe, Naoto Inoue