Patents by Inventor Zaid QURESHI

Zaid QURESHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FlatFlash system for byte granularity accessibility of memory in a unified memory-storage hierarchy
    Patent number: 11074189
    Abstract: Various embodiments are provided for providing byte granularity accessibility of memory in a unified memory-storage hierarchy in a computing system by a processor. A location of one or more secondary memory medium pages in a secondary memory medium may be mapped into an address space of a primary memory medium to extend a memory-storage hierarchy of the secondary memory medium. The one or more secondary memory medium pages may be promoted from the secondary memory medium to the primary memory medium. The primary memory medium functions as a cache to provide byte level accessibility to the one or more primary memory medium pages. A memory request for the secondary memory medium page may be redirected using a promotion look-aside buffer (“PLB”) in a host bridge associated with the primary memory medium and the secondary memory medium.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: July 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ahmed Abulila, Vikram Sharma Mailthody, Zaid Qureshi, Jian Huang, Nam Sung Kim, Jinjun Xiong, Wen-Mei Hwu
  • Providing direct data access between accelerators and storage in a computing environment, wherein the direct data access is independent of host CPU and the host CPU transfers object map identifying object of the data
    Patent number: 11048447
    Abstract: Embodiments for providing direct access to non-volatile memory by a processor. One or more accelerators may be provided, via an application programming interface (“API”), direct access to non-volatile storage independent of a host central processing unit (“CPU”) on a control path or data path to perform a read operation and write operation of data.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: June 29, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zaid Qureshi, I-Hsin Chung, Wen-Mei Hwu, Jinjun Xiong
  • Crash recoverability for graphics processing units (GPU) in a computing environment
    Patent number: 11016861
    Abstract: Embodiments for crash recoverability for graphics processing units (GPUs) by a processor. GPU application data and kernel execution state of one or more GPUs may be checkpointed. The checkpointed GPU application data and the kernel execution state may be recovered. The checkpointed GPU application data and the kernel execution state may be persisted on non-volatile memory.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: May 25, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: I-Hsin Chung, Zaid Qureshi, Jinjun Xiong, Hubertus Franke
  • PROVIDING DIRECT DATA ACCESS BETWEEN ACCELERATORS AND STORAGE IN A COMPUTING ENVIRONMENT, WHEREIN THE DIRECT DATA ACCESS IS INDEPENDENT OF HOST CPU AND THE HOST CPU TRANSFERS OBJECT MAP IDENTIFYING OBJECT OF THE DATA
    Publication number: 20210117333
    Abstract: Embodiments for providing direct access to non-volatile memory by a processor. One or more accelerators may be provided, via an application programming interface (“API”), direct access to non-volatile storage independent of a host central processing unit (“CPU”) on a control path or data path to perform a read operation and write operation of data.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 22, 2021
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zaid QURESHI, I-Hsin CHUNG, Wen-Mei HWU, Jinjun XIONG
  • FLATFLASH SYSTEM FOR BYTE GRANULARITY ACCESSIBILITY OF MEMORY IN A UNIFIED MEMORY-STORAGE HIERARCHY
    Publication number: 20200401530
    Abstract: Various embodiments are provided for providing byte granularity accessibility of memory in a unified memory-storage hierarchy in a computing system by a processor. A location of one or more secondary memory medium pages in a secondary memory medium may be mapped into an address space of a primary memory medium to extend a memory-storage hierarchy of the secondary memory medium. The one or more secondary memory medium pages may be promoted from the secondary memory medium to the primary memory medium. The primary memory medium functions as a cache to provide byte level accessibility to the one or more primary memory medium pages. A memory request for the secondary memory medium page may be redirected using a promotion look-aside buffer (“PLB”) in a host bridge associated with the primary memory medium and the secondary memory medium.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 24, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ahmed ABULILA, Vikram SHARMA MAILTHODY, Zaid QURESHI, Jian HUANG, Nam SUNG KIM, Jinjun XIONG, Wen-Mei HWU
  • CRASH RECOVERABILITY FOR GRAPHICS PROCESSING UNITS (GPU) IN A COMPUTING ENVIRONMENT
    Publication number: 20200327019
    Abstract: Embodiments for crash recoverability for graphics processing units (GPUs) by a processor. GPU application data and kernel execution state of one or more GPUs may be checkpointed. The checkpointed GPU application data and the kernel execution state may be recovered. The checkpointed GPU application data and the kernel execution state may be persisted on non-volatile memory.
    Type: Application
    Filed: April 11, 2019
    Publication date: October 15, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: I-Hsin CHUNG, Zaid QURESHI, Jinjun XIONG, Hubertus FRANKE