Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.

Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.

Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.

Abstract: Methods, apparatuses and systems for physical link error data capture and analysis. A receiver is coupled to receive a data stream via a point-to-point serial link. A control circuit is coupled with the receiver to cause the receiver to selectively sample the data stream according to an offset parameter and an interval parameter. Comparison circuitry compares the data stream sample to expected data values to determine a bit error rate.

Abstract: Methods, apparatuses and systems for physical link error data capture and analysis.

Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.

Abstract: Methods and apparatuses for detecting an in-band reset using digital circuitry. A first counting circuit is coupled to receive a first clock signal and to generate output signals based on a number of cycles of the first clock signal. A second counting circuit is coupled to receive a second clock signal and the output signals from the first counting circuit. The second counting circuit generates output signals based on number of cycles of the second clock signal. A comparison circuit is coupled with to receive the output signals of the second counting circuit and to generate a reset signal if the output signals from the second counting circuit correspond to a pre-selected range.

Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.

Abstract: In some embodiments, a transmitter includes a first circuit coupled to an input port of the transmitter, and a second circuit coupled to the first circuit and to an output port of the transmitter, wherein the first circuit is sized with respect to the second circuit such that for a pulse signal applied to the input port, the transmitter generates an output signal having a rise-time and a fall-time that are substantially equal at the output port.

Abstract: Methods, apparatuses and systems for physical link error data capture and analysis.

Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.

Abstract: An apparatus and method for low latency power management on a serial data link are described. In one embodiment, the method includes the detection of an electrical idle exit condition during receiver operation in an electrical idle state. Once detected, data synchronization is performed according to one or more received data synchronization training patterns. Finally, when the synchronization is performed within a determined synchronization re-establishment period, the receiver will resume operation according to a normal power state. Accordingly, the embodiment described illustrates an open loop, low latency power resumption operation for power management within 3GIO links.

Abstract: Methods and apparatus are disclosed for using in-band signal(s) over a differential serial data link to reduce power usage of a transmitter and receiver coupled by the link.

Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.

Abstract: A method and apparatus for automated electrical validation to detect and analyze worst case SSO conditions are described. In one embodiment, the method includes driving a plurality of switching I/O patterns having a predetermined frequency content to achieve a plurality of varying stress levels within an I/O subsystem selected for electrical validation. When a problematic I/O pattern is detected, the problematic I/O pattern is driven through the I/O subsystem in order to identify problematic behavior within the I/O subsystem. Once the problematic behavior is resolved, the method may be repeated while margining an input reference voltage or system platform timing until electrical validation of the selected I/O subsystem is complete.

Abstract: An apparatus and method for low latency power management on a serial data link are described. In one embodiment, the method includes the detection of an electrical idle exit condition during receiver operation in an electrical idle state. Once detected, data synchronization is performed according to one or more received data synchronization training patterns. Finally, when the synchronization is performed within a determined synchronization re-establishment period, the receiver will resume operation according to a normal power state. Accordingly, the embodiment described illustrates an open loop, low latency power resumption operation for power management within 3GIO links.

Abstract: Various bus trace topologies are provided which allow for shorter stub lengths, reduced motherboard costs, more efficient routing between multiple agents, and bus traces with better matched characteristic impedances.

Abstract: Methods and apparatus are disclosed for using in-band signal(s) over a differential serial data link to reduce power usage of a transmitter and receiver coupled by the link.

Abstract: Various bus trace topologies are provided which allow for shorter stub lengths, reduced motherboard costs, more efficient routing between multiple agents, and bus traces with better matched characteristic impedances.

Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.