Abstract: A source synchronous bus system is provided with a bus; a first device connected to the bus, having a driver to drive data and strobe signals, via the bus; and a second device connected to the bus, having a receiver to receive data and the strobe signals from the bus, and to select one of rising and falling edges of the strobe signals to latch a corresponding one of rising and falling edges of the data received from the bus, for subsequent data processing functions in order to compensate for systematic differences between rising and falling edges of the data received, via the bus.

Abstract: An electronic assembly is disclosed which includes a printed circuit board. A computer processor package is centrally positioned on an upper surface of the printed circuit board. A computer processor is positioned on an upper surface of the computer processor package. A first plurality of power delivery components is positioned on an upper surface of the printed circuit board on one side of the computer processor package. One or more additional pluralities of power delivery components may be positioned on the upper surface of the printed circuit board on other sides of the computer processor package. A high frequency current may be routed from one or more of the first and/or additional pluralities of power delivery components over an elongate flex circuit to the computer processor. A series of decoupling capacitors may be coupled to the elongate flex circuit to enhance a transfer of high frequency current over the elongate flex circuit.

Abstract: A source synchronous bus system is provided with a bus; a first device connected to the bus, having a driver to drive data and strobe signals, via the bus; and a second device connected to the bus, having a receiver to receive data and the strobe signals from the bus, and to select one of rising and falling edges of the strobe signals to latch a corresponding one of rising and falling edges of the data received from the bus, for subsequent data processing functions in order to compensate for systematic differences between rising and falling edges of the data received, via the bus.

Abstract: An electronic assembly is disclosed which includes a printed circuit board. A computer processor package is centrally positioned on an upper surface of the printed circuit board. A computer processor is positioned on an upper surface of the computer processor package. A first plurality of power delivery components is positioned on an upper surface of the printed circuit board on one side of the computer processor package. One or more additional pluralities of power delivery components may be positioned on the upper surface of the printed circuit board on other sides of the computer processor package. A high frequency current may be routed from one or more of the first and/or additional pluralities of power delivery components over an elongate flex circuit to the computer processor. A series of decoupling capacitors may be coupled to the elongate flex circuit to enhance a transfer of high frequency current over the elongate flex circuit.

Abstract: A multi-layer electronic device package includes first and second outer layers and at least one signal layer disposed between the outer layers. The signal layer includes signal traces and ground traces interleaved with the signal traces. A method of routing signal traces in an electronic device package includes the acts of disposing a plurality of signal traces in at least one substrate layer, and interleaving a plurality of ground traces with the signal traces.

Abstract: A multi-layer electronic device package includes first and second outer layers and at least one signal layer disposed between the outer layers. The signal layer includes signal traces and ground traces interleaved with the signal traces. A method of routing signal traces in an electronic device package includes the acts of disposing a plurality of signal traces in at least one substrate layer, and interleaving a plurality of ground traces with the signal traces.

Abstract: In order to terminate a non-symmetric transmission line having at least three terminations to which chips are coupled in a way which will attain impedance matching, the termination impedances at the chips are dynamically changed according to the topology of the network and which chip is driving the transmission line.

Abstract: A multi-layer electronic device package includes first and second outer layers and at least one signal layer disposed between the outer layers. The signal layer includes signal traces and ground traces interleaved with the signal traces.

Abstract: A multi-layer electronic device package includes first and second outer layers and at least one signal layer disposed between the outer layers. The signal layer includes signal traces and ground traces interleaved with the signal traces.

Abstract: A multi-layer electronic device package includes first and second outer layers and at least one signal layer disposed between the outer layers. The signal layer includes signal traces and ground traces interleaved with the signal traces. A method of routing signal traces in an electronic device package includes the acts of disposing a plurality of signal traces in at least one substrate layer, and interleaving a plurality of ground traces with the signal traces.