Abstract: In response to a notification of a fault captured in a system, a fault isolator serially analyzes each clock object to determine captured faults associated with the clock object. For each of the clock objects determined to have a captured fault, the fault isolator initiates a repair action for the chip represented by the clock object. The fault isolator concurrently analyzes the non-clock objects to determine captured faults associated with the non-clock objects after analysis of the clock objects. For each of the non-clock objects determined to have a captured fault, the fault isolator initiates a repair action for the chip represented by the non-clock object.

Abstract: A method, apparatus and program product improve computer reliability by, in part, identifying a plurality of error occurrences from Error Correction Codes. It may then be determined if the plurality of error occurrences are associated with a single bit of a bus. The determined, single bit may correspond to a faulty component of the bus. This level of identification efficiently addresses problems. For instance, a corrective algorithm may be applied if the plurality of error occurrences are associated with the single bit. Alternatively, the bus may be disabled if the plurality of error occurrences are not associated with the single bit of the bus. In this manner, implementations may detect, identify and act in response to multiple failure modes.

Abstract: A method, apparatus and program product improve computer reliability by, in part, identifying a plurality of error occurrences from Error Correction Codes. It may then be determined if the plurality of error occurrences are associated with a single bit of a bus. The determined, single bit may correspond to a faulty component of the bus. This level of identification efficiently addresses problems. For instance, a corrective algorithm may be applied if the plurality of error occurrences are associated with the single bit. Alternatively, the bus may be disabled if the plurality of error occurrences are not associated with the single bit of the bus. In this manner, implementations may detect, identify and act in response to multiple failure modes.