Patents by Inventor Zdzislaw Czarnul
Zdzislaw Czarnul has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7042291Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: GrantFiled: September 9, 2005Date of Patent: May 9, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Ueno, Tetsuro Itakura, Krystyna Czarnul, legal representative, Zdzislaw Czarnul, deceased
-
Publication number: 20060006942Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: ApplicationFiled: September 9, 2005Publication date: January 12, 2006Inventors: Takeshi Ueno, Tetsuro Itakura, Zdzislaw Czarnul, Krystyna Czarnul
-
Patent number: 6975171Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: GrantFiled: February 17, 2005Date of Patent: December 13, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Ueno, Tetsuro Itakura, Krystyna Czarnul, legal representative, Zdzislaw Czarnul, deceased
-
Patent number: 6919768Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: GrantFiled: March 2, 2004Date of Patent: July 19, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Ueno, Tetsuro Itakura, Krystyma Czarnul, Zdzislaw Czarnul
-
Publication number: 20050146381Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: ApplicationFiled: February 17, 2005Publication date: July 7, 2005Inventors: Takeshi Ueno, Tetsuro Itakura, Zdzislaw Czarnul, Krystyna Czarnul
-
Patent number: 6876256Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: GrantFiled: March 2, 2004Date of Patent: April 5, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Ueno, Tetsuro Itakura, Krystyma Czarnul, Zdzislaw Czarnul
-
Publication number: 20040164795Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: ApplicationFiled: March 2, 2004Publication date: August 26, 2004Inventors: Takeshi Ueno, Tetsuro Itakura, Krystyma Czarnul, Zdzislaw Czarnul
-
Publication number: 20040164794Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: ApplicationFiled: March 2, 2004Publication date: August 26, 2004Inventors: Takeshi Ueno, Tetsuro Itakura, Krystyma Czarnul, Zdzislaw Czarnul
-
Patent number: 6781464Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: GrantFiled: October 28, 2002Date of Patent: August 24, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Ueno, Tetsuro Itakura, Zdzislaw Czarnul
-
Publication number: 20030095006Abstract: A balanced amplifier comprising a pair of voltage-to-current converters including a first input terminal, a second input terminal, a first output terminal and a second output terminal to convert an input voltage applied to the first input terminal into an output current output from each of the first output terminal and the second output terminal, the second input terminal and the second output terminal of one of the converters being connected to the second input terminal and the second output terminal of the other of the converters to cancel common-mode components each other and extract differential-mode components.Type: ApplicationFiled: October 28, 2002Publication date: May 22, 2003Inventors: Takeshi Ueno, Tetsuro Itakura, Zdzislaw Czarnul, Krystyna Czarnul
-
Patent number: 6359510Abstract: A balanced type DDA 1 is combined with a single end type DDA 2 to form a differential amplifier circuit 3 which is a balanced type DDA. The balanced type DDA 1 has four input terminals VPP, VPN, VNN and VNP which are input terminals of two differential input stages, and two output terminals VoutP and VoutN which are output terminals of two output stages. These terminals are four input terminals and two output terminals of the differential amplifier circuit 3. The single end type DDA 2 has four input terminals, which are input terminals of two differential input stages and which are connected to the four input terminals of the differential amplifier circuit 3, respectively. The single end type DDA 2 also has an output terminal Vout of one output stage, which serves as a control output terminal for the feedback control of the differential amplifier circuit 3.Type: GrantFiled: September 8, 2000Date of Patent: March 19, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hirotomo Ishii, Zdzislaw Czarnul
-
Patent number: 6344780Abstract: An impedance adjusting circuit for setting accurate impedance ratio has a plurality of paths each having impedance adjusting section which is a serially connected switch element and impedance element. A synthesized impedance of an ON resistance of the switch element and impedance of the impedance element in each impedance adjusting section is set to have a predetermined proportional relation. This enables accurate trimming without generating peak level variation of frequency characteristic when applied to a filter.Type: GrantFiled: September 15, 1999Date of Patent: February 5, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Noriaki Dobashi, Zdzislaw Czarnul
-
Patent number: 6329849Abstract: The apparatus for converting a differential input voltage to two fully balanced output currents is achieved by providing a common mode control circuit of a simplified circuit construction to an operational transconductance amplifier. The apparatus includes an operational transconductance amplifier that is comprised of an OTA input section for converting two input voltages of the differential input voltage to a pair of interim output currents and an OTA output section for converting the interim output currents to the output currents, and a common mode controlling circuit for providing a control voltage to the OTA.Type: GrantFiled: November 12, 1999Date of Patent: December 11, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Zdzislaw Czarnul, Hirotomo Ishii, Kazuhiro Oda
-
Patent number: 5990737Abstract: A balanced amplifier includes first and second multi-input single-ended output differential amplifiers having matched characteristics and a feedback circuit. The feedback circuit connects differential input terminals and output terminals of the first and second multi-input single-ended output differential amplifiers so that all of the differential input terminals of the first and second multi-input single-ended output differential amplifiers are virtually shorted.Type: GrantFiled: April 28, 1998Date of Patent: November 23, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Zdzislaw Czarnul, Hiroshi Tanimoto, Tetsuro Itakura
-
Patent number: 5986507Abstract: A current mirror circuit comprises a first current-to-voltage converter for inputting an input current, a second current-to-voltage converter, a first transistor, the collector or drain of which outputs an output current, and the emitter or source of which is connected to the second current-to-voltage converter, and a control unit for controlling a control electrode of the first transistor. The control unit refers a voltage current-to-voltage converted by the first and second current-to-voltage converters to control the first transistor so that currents flow from the control unit to the first and second current-to-voltage converters at a predetermined ratio.Type: GrantFiled: September 12, 1996Date of Patent: November 16, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuro Itakura, Zdzislaw Czarnul
-
Patent number: 5977818Abstract: A multi-input transistor circuit including a plurality of input MOS transistors having gates each serving as an analog voltage input terminal, operating in a non-saturation area and connected in parallel; and circuit for providing a constant drain/source voltage for each of the input MOS transistors, and having a current output point. A multi-input transconductance circuit including first and second MOS transistor groups having gates serving as first and second analog voltage input terminals, respectively, operating in a non-saturation area and connected in parallel; and a circuit for providing constant drain/source voltage for the transistors in each group and connected to a common source connecting point of each of the first and second MOS transistor groups, and having first and second current output terminals. The multi-input transistor and the multi-input transconductance circuit exhibit input-to-output linearity, have a wide dynamic range and are equivalent to an n-gate transistor.Type: GrantFiled: April 7, 1995Date of Patent: November 2, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Zdzislaw Czarnul, Kazuhiro Tsuji
-
Patent number: 5963088Abstract: Non-inverting input terminals of first and second operational amplifiers having the same characteristics are connected together. A first circuit is connected between the inverting input terminal of the first operational amplifier and a first signal input terminal. A second circuit is connected between the non-inverting input terminal of the first operational amplifier and the first signal input terminal. The first circuit receives a feedback signal from an output terminal of the first operational amplifier. The second circuit is connected to a reference voltage source. A third circuit is connected between the inverting input terminal of the second operational amplifier and a second signal input terminal. A fourth circuit is connected between the non-inverting input terminal of the second operational amplifier and the second signal input terminal. The third circuit receives a feedback signal from an output terminal of the second operational amplifier.Type: GrantFiled: July 29, 1997Date of Patent: October 5, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Zdzislaw Czarnul, Noriaki Dobashi
-
Patent number: 5870045Abstract: The present invention provides a D/A converter which has a small area in the chip, a linear current output and a high-speed operation. Each of resistors R.sub.11 -R.sub.n1 in a resistor train 11a is composed of four MOS transistors which are connected in parallel with each other and each of resistors R.sub.12 -R.sub.n2 in a resistor train 11b is composed of four MOS transistors which are connected in parallel with each other. Between the connecting nodes of the resistor trains 11a, 11b, MOS transistors ST.sub.11, ST.sub.12, ST.sub.13, ST.sub.14 -ST.sub.n1, ST.sub.n2, ST.sub.n3 and ST.sub.n4 which serve as switches and resistors are connected. All the MOS transistors have the same conductive type and size. Gate control signals C.sub.11 -C.sub.n1 ; C.sub.12 -C.sub.n2 turn MOS transistors ON but each of them has a different voltage value. A current difference between the output terminals Za and Zb is converted into a voltage difference by an operational amplifier or the like.Type: GrantFiled: August 28, 1997Date of Patent: February 9, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Naoyuki Hamanishi, Kazuhiro Oda, Zdzislaw Czarnul
-
Patent number: 4710726Abstract: A circuit useful as a voltage tunable resistive element comprises four matched MOS transistors in which each of the first and second have their drains interconnected to a first input terminal and each of the third and fourth have their drains interconnected to a second input terminal, the first and third have their sources interconnected to a first output terminal and the second and fourth have their sources interconnected to a second output terminal, and the first and fourth have their gates interconnected to a first control terminal and the second and third have their gates interconnected to a second control terminal. A continuous-time integrator is described which includes such a resistive element.Type: GrantFiled: February 27, 1986Date of Patent: December 1, 1987Assignee: Columbia University in the City of New YorkInventor: Zdzislaw Czarnul