Patents by Inventor Zeeshan Umar

Zeeshan Umar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230127874
    Abstract: A power semiconductor system includes: a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board; and an inductor module attached to the power stage module and having an inductor electrically connected to an output node of the power stage module. The inductor includes windings patterned into a second printed circuit board of the inductor module.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 11539291
    Abstract: A method of manufacturing a power semiconductor system includes providing a power module having one or more power transistor dies and attaching an inductor module to the power module such that the inductor module is electrically connected to a node of the power module. The inductor module includes a substrate with a magnetic material and windings at one or more sides of the substrate. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: December 27, 2022
    Assignee: Infineon Technologies Austria AG
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Publication number: 20210036610
    Abstract: A method of manufacturing a power semiconductor system includes providing a power module having one or more power transistor dies and attaching an inductor module to the power module such that the inductor module is electrically connected to a node of the power module. The inductor module includes a substrate with a magnetic material and windings at one or more sides of the substrate. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Application
    Filed: October 20, 2020
    Publication date: February 4, 2021
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 10833583
    Abstract: A method of manufacturing a power semiconductor system includes providing a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board and attaching an inductor module to the power stage module such that the inductor module is electrically connected to an output node of the power stage module. The inductor module includes a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: November 10, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Publication number: 20200212798
    Abstract: A method of manufacturing a power semiconductor system includes providing a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board and attaching an inductor module to the power stage module such that the inductor module is electrically connected to an output node of the power stage module. The inductor module includes a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Application
    Filed: March 6, 2020
    Publication date: July 2, 2020
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 10601314
    Abstract: A power semiconductor system includes a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board, and an inductor module attached to the power stage module and having an inductor electrically connected to an output node of the power stage module. The inductor is formed from a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Corresponding methods of manufacturing the power semiconductor system and the inductor module are also disclosed.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: March 24, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Publication number: 20190081562
    Abstract: A power semiconductor system includes a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board, and an inductor module attached to the power stage module and having an inductor electrically connected to an output node of the power stage module. The inductor is formed from a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Corresponding methods of manufacturing the power semiconductor system and the inductor module are also disclosed.
    Type: Application
    Filed: September 8, 2017
    Publication date: March 14, 2019
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 10186481
    Abstract: A device includes a semiconductor chip, a plurality of planar metallization layers arranged over a main surface of the semiconductor chip, and a passive component including windings, wherein each of the windings is formed in one of the plurality of planar metallization layers.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: January 22, 2019
    Assignee: Infineon Technologies AG
    Inventors: Maciej Wojnowski, Frank Daeche, Zeeshan Umar
  • Publication number: 20170271260
    Abstract: A device includes a semiconductor chip, a plurality of planar metallization layers arranged over a main surface of the semiconductor chip, and a passive component including windings, wherein each of the windings is formed in one of the plurality of planar metallization layers.
    Type: Application
    Filed: March 15, 2017
    Publication date: September 21, 2017
    Applicant: Infineon Technologies AG
    Inventors: Maciej Wojnowski, Frank Daeche, Zeeshan Umar