Abstract: The adhesion between a polymeric fluorocarbon film and a substrate is improved by providing a thin layer of silicon or a silicide intermediate between the substrate and the polymeric fluorocarbon film, such that a region containing a high density of Si-C bonds is formed.

Abstract: Polymeric fluorocarbon layer is prepared by plasma enhanced chemical vapor deposition in a chamber, the walls of which are coated with a polymeric fluorocarbon film by introducing a gaseous polymerizable fluorocarbon into the chamber and applying radio-frequency at a power level of about 100 to about 1000 watts, employing a pressure of about 10 to 180 mTorr and a self-bias voltage of about -50 to about -700 volts. The polymeric fluorocarbon layer is about 0.05 to about 5 .mu.m thick, has a maximum dielectric constant of about 2.5, has a C/F ratio of about 1:1 to about 1:3, is thermally stable at temperatures of at least about 350.degree. C., and is substantially free from metallic contamination and oxygen.

Abstract: Polymeric fluorocarbon layer is prepared by plasma enhanced chemical vapor deposition in a chamber, the walls of which are coated with a polymeric fluorocarbon film by introducing a gaseous polymerizable fluorocarbon into the chamber and applying radio-frequency at a power level of about 100 to about 1000 watts, employing a pressure of about 10 to 180 mTorr and a self-bias voltage of about -50 to about -700 volts. The polymeric fluorocarbon layer is about 0.05 to about 5 .mu.m thick, has a maximum dielectric constant of about 2.5, has a C/F ratio of about 1:1 to about 1:3, is thermally stable at temperatures of at least about 350.degree. C., and is substantially free from metallic contamination and oxygen.

Abstract: The present invention relates to a low-pressure chemical vapor deposition (LPCVD) process for depositing silicon dioxide. In particular, the present invention describes a process involving a pre-cleaning step in which all impurities are removed from the substrate followed by a LPCVD step performed at temperatures of between 200.degree. C. and 300.degree. C. The process of the present invention is intended to replace higher temperature LPCVD and thermal processes for depositing silicon dioxide.More particularly, the present invention involves a process in which a substrate is washed using a predetermined cleaning process. The substrate is then exposed to a dilute hydrofluoric acid solution which removes native oxide and contaminants from the surface. Next, the substrate is rinsed with, for example, de-ionized water or ultra-clean water to remove any hydrofluoric acid or other residue from the previous process steps.

Abstract: Silicon dioxide insulating films for integrated circuits are provided with enhanced electronic properties, including enhanced dielectric breakdown of MOS insulating layers and reduced trapping of holes by exposing a metal oxide semiconductor wafer including an exposed silicon dioxide layer, in an ambient of flowing oxygen gas, to heating radiation from a halogen lamp for a duration on the order of 100 seconds to achieve annealing temperature on the order of 1000.degree. C.For reduced hole trapping, the ambient gas is oxygen and the annealing temperature is on the order of 1000.degree. C. for a duration on the order of 100 seconds, depending on the oxide thickness.Nitrogen, occurring at the silicon-silicon dioxide interface as a result of previous processing including a long anneal in nitrogen, increases the improvement of the silicon dioxide by the subsequent rapid thermal annealing in oxygen.

Abstract: Silicon dioxide insulating films for integrated circuits are provided with enhanced electronic properties, including decreased water content and reduced trapping of electrons, by exposing a metal oxide semiconductor wafer including an exposed silicon dioxide layer, in an ambient of flowing inert gas, to heating radiation from a halogen lamp for a duration on the order of ten seconds to achieve annealing temperature in the range 600C.-800C.

Abstract: The present invention relates to storage devices which utilize a floating single crystal electrode onto which elcetrons are injected to vary the capacitance of a device which includes capacitance contributions from a pair of insulator regions and that resulting from the uncharged floating single crystal electrode. The memory cell includes at least a pair of other electrodes one of which is utilized to provide two voltage levels to cause injection of electrons and provide an interrogation or read pulse. The other of the pair is utilized as a sense electrode which capacitively senses current when a read pulse is applied to the device via a control electrode. A second embodiment utilizes a pair of injector electrodes, a separate control electrode and a sense electrode in addition to the single crystal floating electrode. A memory array incorporating a device using the single crystal floating electrode is also disclosed.