Patents by Inventor Zeev Oster

Zeev Oster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9634496
    Abstract: Techniques for powering up a wireless power receiving device are described herein. An example computing device includes a power receiving unit to wirelessly receive power from a power transmitting unit. The platform hardware includes a System on a Chip (SoC), a multicomm device, and a power sequence manager. The multicomm device is for wireless communication with two or more communication standards. One of the communication standards is used as a side channel for communicating with the power transmitting unit. The power sequence manager component manages activation of platform components of the platform hardware during a low battery cold boot condition. Upon detecting wireless power, the multicomm device is configured to automatically activate and the power sequence manager component is to suppress activation of other platform components of the platform hardware.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: April 25, 2017
    Assignee: Intel IP Corporation
    Inventors: Yuval Elad, Shahar Porat, Zeev Oster, Siva Ramakrishnan, Reed D. Vilhauer, Brian A. Leete, Yuval Bachrach
  • Publication number: 20170090537
    Abstract: Techniques for powering up a wireless power receiving device are described herein. An example computing device includes a power receiving unit to wirelessly receive power from a power transmitting unit. The platform hardware includes a System on a Chip (SoC), a multicomm device, and a power sequence manager. The multicomm device is for wireless communication with two or more communication standards. One of the communication standards is used as a side channel for communicating with the power transmitting unit. The power sequence manager component manages activation of platform components of the platform hardware during a low battery cold boot condition. Upon detecting wireless power, the multicomm device is configured to automatically activate and the power sequence manager component is to suppress activation of other platform components of the platform hardware.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Applicant: INTEL IP CORPORATION
    Inventors: Yuval Elad, Shahar Porat, Zeev Oster, Siva Ramakrishnan, Reed D. Vilhauer, Brian A. Leete, Yuval Bachrach
  • Patent number: 7697525
    Abstract: A network node in a communication network includes a plurality of ports, at least a subset of which is grouped in a link aggregation (LAG) group. The node includes packet processing logic, which is coupled to receive data packets having respective destination addresses that specify forwarding the packets to groups of multiple recipients through at least one of the ports and to process the data packets so as to forward only a single copy of each of the data packets via the output ports in the subset, while distributing forwarded copies of the data packets among the output ports in the subset so as to balance a traffic load within the LAG group.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: April 13, 2010
    Assignee: Corrigent Systems Ltd.
    Inventors: David Zelig, Rafi Ram, Leon Bruckman, Zeev Oster, Ronen Solomon
  • Patent number: 7593400
    Abstract: A method for communication includes configuring a network node having at least first and second line cards, the line cards having respective ports, to operate as a distributed media access control (MAC) bridge in a Layer 2 network. Each of the line cards has a respective forwarding database (FDB). Upon receiving a data packet on a port of the network node from a MAC source address, the data packet is conveyed to at least the first line card for transmission to the MAC destination address. The MAC source address of the data packet is checked against the records in the FDB of the first line card. If the FDB does not contain a record of an association of the MAC source address with the port on which the data packet was received, the record is added to the FDB of the first line card, which sends a message to at least the second line card informing the second line card of the association.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: September 22, 2009
    Assignee: Corrigent Systems Ltd.
    Inventors: David Zelig, Leon Bruckman, Ronen Solomon, Zeev Oster, David Rozenberg, Uzi Khill
  • Publication number: 20080151890
    Abstract: A network node in a communication network includes a plurality of ports, at least a subset of which is grouped in a link aggregation (LAG) group. The node includes packet processing logic, which is coupled to receive data packets having respective destination addresses that specify forwarding the packets to groups of multiple recipients through at least one of the ports and to process the data packets so as to forward only a single copy of each of the data packets via the output ports in the subset, while distributing forwarded copies of the data packets among the output ports in the subset so as to balance a traffic load within the LAG group.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Applicant: CORRIGENT SYSTEMS LTD.
    Inventors: David Zelig, Rafi Ram, Leon Bruckman, Zeev Oster, Ronen Solomon
  • Publication number: 20070268915
    Abstract: A method for communication includes configuring a network node having at least first and second line cards, the line cards having respective ports, to operate as a distributed media access control (MAC) bridge in a Layer 2 network. Each of the line cards has a respective forwarding database (FDB). Upon receiving a data packet on a port of the network node from a MAC source address, the data packet is conveyed to at least the first line card for transmission to the MAC destination address. The MAC source address of the data packet is checked against the records in the FDB of the first line card. If the FDB does not contain a record of an association of the MAC source address with the port on which the data packet was received, the record is added to the FDB of the first line card, which sends a message to at least the second line card informing the second line card of the association.
    Type: Application
    Filed: May 19, 2006
    Publication date: November 22, 2007
    Applicant: CORRIGENT SYSTEMS LTD.
    Inventors: David Zelig, Leon Bruckman, Ronen Solomon, Zeev Oster, David Rozenberg, Uzi Khill
  • Publication number: 20060029006
    Abstract: A system and method for coordinating data communication especially applicable to inverse multiplex (IMUX) systems. A fixed portion of transmitted data is dedicated to overhead data. During link start-up, receiver synchronization is aided by the transmission of a fixed data pattern in the user data and contrasting data in the overhead data. Changes in IMUX configuration, such as changes in the set of links participating in the IMUX, are mediated via commands that allow fast reconfiguration during start-up or in the event of link failure (“Panic Change”), or continued error-free transmission of data during planned reconfigurations (Sync Change).
    Type: Application
    Filed: August 9, 2004
    Publication date: February 9, 2006
    Inventor: Zeev Oster
  • Patent number: 6933745
    Abstract: A system and method for transmitting data includes one or more transmitters connected to each of at least one bus data line via open-driver bus data line drivers, and one or more receivers. In a preferred embodiment, the devices are interconnected by a parallel interface using a bus architecture having the bus data and carrier-sense (CRS) lines each driven by open-collector or open-drain drivers in a wired-and configuration. Pullup resistors and a common clock signal are also provided. Each device is provided with an interfacing unit which connects the device to the bus, and detects collisions by comparing data transmitted by the device with data received from the bus. The invention is particularly applicable to implementation as a backplane connecting intercommunicating printed wiring boards having interfaces such as the IEEE 802.3 (Ethernet) Media Independent Interface (MII), the interfacing unit serving to emulate the Ethernet PHY.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: August 23, 2005
    Assignee: Spediant Systems Ltd.
    Inventors: Eliezer Magal, Zeev Oster
  • Publication number: 20050062499
    Abstract: A system and method for transmitting data includes one or more transmitters connected to each of at least one bus data line via open-driver bus data line drivers, and one or more receivers. In a preferred embodiment, the devices are interconnected by a parallel interface using a bus architecture having the bus data and carrier-sense (CRS) lines each driven by open-collector or open-drain drivers in a wired-and configuration. Pullup resistors and a common clock signal are also provided. Each device is provided with an interfacing unit which connects the device to the bus, and detects collisions by comparing data transmitted by the device with data received from the bus. The invention is particularly applicable to implementation as a backplane connecting intercommunicating printed wiring boards having interfaces such as the IEEE 802.3 (Ethernet) Media Independent Interface (MII), the interfacing unit serving to emulate the Ethernet PHY.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 24, 2005
    Inventors: Eliezer Magal, Zeev Oster
  • Publication number: 20040223519
    Abstract: An inverse multiplexing method for transmitting data via multiple data links and a system for implementing same. Efficient utilization of links having disparate data rates is provided by apportioning data units to the links in proportion to their data rates. Rather than perform the apportioning algorithm in real time, the algorithm is executed off-line, and the results recorded as a mapping vector. The mapping vector is used by the transmitter to apportion data units to the links, and by the receiver to re-assemble the data units.
    Type: Application
    Filed: May 5, 2003
    Publication date: November 11, 2004
    Applicant: SPEDIANT SYSTEMS LTD.
    Inventors: Zeev Oster, Ariel Almog
  • Publication number: 20040218530
    Abstract: A system and method for transmitting data streams subject to crosstalk, in which an adjustable parameter, preferably data rate, is adjusted using feedback of performance characteristics, preferably signal-to-noise ratio (SNR) and line attenuation, maximizing total throughput of the data streams. The invention is particularly applicable to inverse multiplex (IMUX) systems, where total throughput is more important than the throughput of any individual data stream.
    Type: Application
    Filed: April 30, 2003
    Publication date: November 4, 2004
    Applicant: SPEDIANT SYSTEMS LTD.
    Inventors: Eli Magal, Zeev Oster
  • Publication number: 20030152112
    Abstract: An inverse multiplexing method for transmitting data via multiple data links by apportioning the symbols to be transmitted among the available communication links in proportion to the individual communication links' symbol transmission rates in a predictable manner, and a system, including a transmitter and a receiver, employing this method. Preferably, a table shared by the transmitter and receiver is used by the transmitter to apportion the symbols to the various communication links and by the receiver to reconstruct the original data. The method allows fine granularity in the division of symbols, which in turn allows for short messages to be transmitted at high speed, and with minimal latency, by using the full capacity of the communication links, with a minimum of overhead.
    Type: Application
    Filed: January 3, 2003
    Publication date: August 14, 2003
    Applicant: SPEDIANT SYSTEMS LTD.
    Inventors: Ariel Almog, Zeev Oster