Abstract: Gate driving circuits, display panels, and display devices are provided. The gate driving circuit includes cascaded gate driving units, each of which includes an input unit, an output unit, a reset control unit, and a pull-down holding unit. The input unit outputs a driving signal to a first node. The output unit outputs a scanning signal in response to the driving signal. The reset control unit outputs a reset control signal to a second node during a first period. The pull-down holding unit receives the reset control signal. The pull-down holding unit outputs a first voltage signal to the first node in response to the reset control signal to reset a potential of the first node during the first period, and outputs the first voltage signal to the first node to maintain the potential of the first node during a second period.

Abstract: Gate driving circuits, display panels, and display devices are provided. The gate driving circuit includes cascaded gate driving units, each of which includes an input unit, an output unit, a reset control unit, and a pull-down holding unit. The input unit outputs a driving signal to a first node. The output unit outputs a scanning signal in response to the driving signal. The reset control unit outputs a reset control signal to a second node during a first period. The pull-down holding unit receives the reset control signal. The pull-down holding unit outputs a first voltage signal to the first node in response to the reset control signal to reset a potential of the first node during the first period, and outputs the first voltage signal to the first node to maintain the potential of the first node during a second period.

Abstract: A gate drive circuit and a display panel. The gate drive circuit includes multi-stage cascaded gate drive units. The gate drive units each include a pull-up control module, an output module, a pull-down module, a pull-down maintain module, a first reference low-level signal input terminal, a second reference low-level signal input terminal, and a pull-up node located in a line between the pull-up control module and the output module. The pull-up control module includes a pull-up control transistor that is electrically connected to the pull-up node and configured to pull a potential of the pull-up node up. The output module includes a scan signal output transistor that is electrically connected to the pull-up node and configured to output a present-stage scan signal under control of the potential of the pull-up node.