Patents by Inventor Zempei Kawazu

Zempei Kawazu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9988738
    Abstract: A method for manufacturing a SiC epitaxial wafer includes: a first step of, by supplying a Si supply gas and a C supply gas, performing a first epitaxial growth on a SiC bulk substrate with a 4H—SiC(0001) having an off-angle of less than 5° as a main surface at a first temperature of 1480° C. or higher and 1530° C. or lower; a second step of stopping the supply of the Si supply gas and the C supply gas and increasing a temperature of the SiC bulk substrate from the first temperature to a second temperature; and a third step of, by supplying the Si supply gas and the C supply gas, performing a second epitaxial growth on the SiC bulk substrate having the temperature increased in the second step at the second temperature.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: June 5, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuyuki Tomita, Yoichiro Mitani, Takanori Tanaka, Naoyuki Kawabata, Yoshihiko Toyoda, Takeharu Kuroiwa, Kenichi Hamano, Akihito Ono, Junji Ochi, Zempei Kawazu
  • Patent number: 9903048
    Abstract: A single-crystal 4H-SiC substrate includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The recesses have a diameter no smaller than 2 ?m and no larger than 20 ?m. The recesses have a depth no smaller than 0.01 ?m and no larger than 0.1 ?m. A single-crystal 4H-SiC substrate also includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The density of the recesses in the epitaxial first single-crystal 4H-SiC layer is at least 10/cm2, and the epitaxial first single-crystal 4H-SiC layer has a defect density no larger than 2/cm2.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: February 27, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Zempei Kawazu, Nobuyuki Tomita, Takanori Tanaka, Yoichiro Mitani, Kenichi Hamano
  • Patent number: 9824911
    Abstract: A substrate support for supporting a substrate when forming a film on a surface of the substrate by chemical vapor deposition. The substrate support includes a graphite material having a recessed portion for accommodating the substrate, a multilayer film on the recessed portion and consisting of a first degassing prevention film of SiC and a sublimation prevention film of TaC or HfC stacked together, and a second degassing prevention film of SiC located on portions of the graphite material other than the recessed portion.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: November 21, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Zempei Kawazu
  • Patent number: 9752254
    Abstract: A method for manufacturing a single-crystal 4H—SiC substrate includes preparing a 4H—SiC bulk single-crystal substrate having a flat surface, and growing an epitaxial first single-crystal 4H—SiC layer having recesses on the 4H—SiC bulk single-crystal substrate to a thickness X, measured in micrometers (?m). The recesses have a diameter Y, measured in micrometers, no smaller than 0.2*X and no larger than 2*X. In addition, the recesses have a depth Z, when measured in micrometers, no smaller than (0.95*X+0.5*10?3), and no larger than 10*X*10?3.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: September 5, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Zempei Kawazu, Nobuyuki Tomita, Takanori Tanaka, Yoichiro Mitani, Kenichi Hamano
  • Publication number: 20160298262
    Abstract: A method for manufacturing a single-crystal 4H-SiC substrate includes preparing a 4H-SiC bulk single-crystal substrate having a flat surface, and growing an epitaxial first single-crystal 4H-SiC layer having recesses on the 4H-SiC bulk single-crystal substrate to a thickness X, measured in micrometers (?m). The recesses have a diameter Y, measured in micrometers, no smaller than 0.2*X and no larger than 2*X. In addition, the recesses have a depth Z, when measured in micrometers, no smaller than (0.95*X+0.5*10?3), and no larger than 10*X*10?3.
    Type: Application
    Filed: June 15, 2016
    Publication date: October 13, 2016
    Inventors: Akihito Ohno, Zempei Kawazu, Nobuyuki Tomita, Takanori Tanaka, Yoichiro Mitani, Kenichi Hamano
  • Publication number: 20160298264
    Abstract: A single-crystal 4H-SiC substrate includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The recesses have a diameter no smaller than 2 ?m and no larger than 20 ?m. The recesses have a depth no smaller than 0.01 ?m and no larger than 0.1 ?m. A single-crystal 4H-SiC substrate also includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The density of the recesses in the epitaxial first single-crystal 4H-SiC layer is at least 10/cm2, and the epitaxial first single-crystal 4H-SiC layer has a defect density no larger than 2/cm2.
    Type: Application
    Filed: June 15, 2016
    Publication date: October 13, 2016
    Inventors: Akihito Ohno, Zempei Kawazu, Nobuyuki Tomita, Takanori Tanaka, Yoichiro Mitani, Kenichi Hamano
  • Patent number: 9422640
    Abstract: A method for manufacturing a single-crystal 4H-SiC substrate includes: preparing a flat 4H-SiC bulk single-crystal substrate; and epitaxially growing a first single-crystal 4H-SiC layer having recesses on the 4H-SiC bulk single-crystal substrate, wherein the first single-crystal 4H-SiC layer has a thickness of X (?m), the recesses have a diameter Y (?m) no smaller than 0.2*X (?m) and no larger than 2*X (?m), and a depth of Z (nm) no smaller than (0.95*X (?m)+0.5 (nm)) and no larger than 10*X (?m).
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: August 23, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akihito Ohno, Zempei Kawazu, Nobuyuki Tomita, Takanori Tanaka, Yoichiro Mitani, Kenichi Hamano
  • Publication number: 20150354090
    Abstract: A method for manufacturing a SiC epitaxial wafer includes: a first step of, by supplying a Si supply gas and a C supply gas, performing a first epitaxial growth on a SiC bulk substrate with a 4H—SiC(0001) having an off-angle of less than 5° as a main surface at a first temperature of 1480° C. or higher and 1530° C. or lower; a second step of stopping the supply of the Si supply gas and the C supply gas and increasing a temperature of the SiC bulk substrate from the first temperature to a second temperature; and a third step of, by supplying the Si supply gas and the C supply gas, performing a second epitaxial growth on the SiC bulk substrate having the temperature increased in the second step at the second temperature.
    Type: Application
    Filed: December 26, 2013
    Publication date: December 10, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuyuki TOMITA, Yoichiro MITANI, Takanori TANAKA, Naoyuki KAWABATA, Yoshihiko TOYODA, Takeharu KUROIWA, Kenichi HAMANO, Akihito ONO, Junji OCHI, Zempei KAWAZU
  • Publication number: 20140295136
    Abstract: A method for manufacturing a single-crystal 4H-SiC substrate includes: preparing a flat 4H-SiC bulk single-crystal substrate; and epitaxially growing a first single-crystal 4H-SiC layer having recesses on the 4H-SiC bulk single-crystal substrate, wherein the first single-crystal 4H-SiC layer has a thickness of X (?m), the recesses have a diameter Y (?m) no smaller than 0.2*X (?m) and no larger than 2*X (?m), and a depth of Z (nm) no smaller than (0.95*X (?m) +0.5 (nm)) and no larger than 10*X (?m).
    Type: Application
    Filed: January 8, 2014
    Publication date: October 2, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Zempei Kawazu, Nobuyuki Tomita, Takanori Tanaka, Yoichiro Mitani, Kenichi Hamano
  • Publication number: 20130327274
    Abstract: A substrate support for supporting a substrate when forming a film on a surface of the substrate by chemical vapor deposition. The substrate support includes a graphite material having a recessed portion for accommodating the substrate, a multilayer film on the recessed portion and consisting of a first degassing prevention film of SiC and a sublimation prevention film of TaC or HfC stacked together, and a second degassing prevention film of SiC located on portions of the graphite material other than the recessed portion.
    Type: Application
    Filed: March 5, 2013
    Publication date: December 12, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Zempei Kawazu
  • Publication number: 20130109134
    Abstract: A method of manufacturing a semiconductor device, includes introducing a substrate into a growth furnace, forming impurity absorption layers on the substrate and on inner walls of the growth furnace, the impurity absorption layers absorbing impurities on a surface of the substrate and impurities in the growth furnace, etching and removing the impurity absorption layers and a portion of the substrate to produce a thinned substrate, forming a buffer layer on the thinned substrate, and forming semiconductor layers on the buffer layer.
    Type: Application
    Filed: June 28, 2012
    Publication date: May 2, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Susumu HATAKENAKA, Zempei KAWAZU, Hiroyuki KAWAHARA, Takashi NAGIRA
  • Publication number: 20100003778
    Abstract: A method of manufacturing a semiconductor laser includes sequentially forming a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on top of one another on a semiconductor substrate; forming a ridge in the second conductivity type semiconductor layer; forming a first insulating film on the second conductivity type semiconductor layer at a first temperature; forming a second insulating film on the first insulating film at a second temperature, lower than the first temperature; and forming an electrode on the second insulating film.
    Type: Application
    Filed: November 20, 2008
    Publication date: January 7, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hitoshi Tada, Tsutomu Yamaguchi, Zempei Kawazu, Yuji Okura
  • Patent number: 7378351
    Abstract: A nitride semiconductor device is manufactured by the step of forming a nitride semiconductor layer form on a GaN substrate main surface, the step of polishing a back surface of the GaN substrate formed with the above-mentioned nitride semiconductor layer, the step of dry etching the back surface of the GaN substrate subjected to the above-mentioned polishing by using a gas mixture of chlorine and oxygen, and the step of forming an n-type electrode on the back surface of the GaN substrate subjected to the above-mentioned dry etching.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: May 27, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuomi Shiozawa, Toshiyuki Oishi, Kazushige Kawasaki, Zempei Kawazu, Yuji Abe
  • Patent number: 7151004
    Abstract: In fabricating a semiconductor laser producing light with a wavelength of 770 to 810 nm, impurities are introduced into an MQW active layer near a light emitting facet of the laser to form a disordered region constituting a window layer. Pump light is applied to the window layer to generate photoluminescence whose wavelength ? dpl (nm) is measured. A blue shift amount ? bl (nm) is defined as the difference between the wavelength ? apl (nm) 0f photoluminescence generated by application of pump light to the active layer on the one hand, and the wavelength ? dpl (nm) of photoluminescence from the window layer under pump light irradiation on the other hand. The blue shift amount ? bl is referenced during the fabrication process in order to predict catastrophic optical damage levels of semiconductor lasers.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: December 19, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihisa Tashiro, Zempei Kawazu, Harumi Nishiguchi, Tetsuya Yagi, Akihiro Shima
  • Publication number: 20060003490
    Abstract: A nitride semiconductor device is manufactured by the step of forming a nitride semiconductor layer form on a GaN substrate main surface, the step of polishing a back surface of the GaN substrate formed with the above-mentioned nitride semiconductor layer, the step of dry etching the back surface of the GaN substrate subjected to the above-mentioned polishing by using a gas mixture of chlorine and oxygen, and the step of forming an n-type electrode on the back surface of the GaN substrate subjected to the above-mentioned dry etching.
    Type: Application
    Filed: June 3, 2005
    Publication date: January 5, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuomi Shiozawa, Toshiyuki Oishi, Kazushige Kawasaki, Zempei Kawazu, Yuji Abe
  • Publication number: 20040165633
    Abstract: In fabricating a semiconductor laser 10 with an oscillation wavelength of 770 to 810 nm, impurities are introduced into an MQW active layer 16 near a light emitting facet of the laser to form a disordered region constituting a window layer 20. Pumped light is applied to the window layer 20 to generate photo luminescence whose wavelength &lgr; dpl (nm) is measured. A blue shift amount &lgr; bl (nm) is defined as the difference between the wavelength &lgr; apl (nm) of photo luminescence generated by application of pumped light to the active layer 16 on the one hand, and the wavelength &lgr; dpl (nm) of photo luminescence from the window layer 20 under pumped light irradiation on the other hand. The blue shift amount &lgr; bl is referenced during the fabrication process in order to predict COD levels of semiconductor laser products.
    Type: Application
    Filed: March 2, 2004
    Publication date: August 26, 2004
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Yoshihisa Tashiro, Zempei Kawazu, Harumi Nishiguchi, Tetsuya Yagi, Akihiro Shima
  • Patent number: 6737288
    Abstract: A heterojunction structure has an AlxGa1−xAs layer (0<x≦1), on which an AlyGa1−yAs layer (0≦y≦1 and y<x) is provided and having a band gap energy smaller than that of the AlxGa1−xAs layer and a valence band energy edge higher than that of the AlxGa1−xAs layer. When the AlyGa1−yAs layer is selectively etched, an Au electrode film is formed on a surface of the AlyGa1−yAs layer outside an etching region, a resist pattern is formed covering the Au electrode film and leaving exposed the etching region, and the AlyGa1−yAs layer is selectively removed by etching while irradiating with light, using an etching solution having a Fermi level higher than that of the AlyGa1−yAs layer.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: May 18, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Zempei Kawazu, Tetsuya Yagi
  • Publication number: 20020175343
    Abstract: In a hetero junction structure having an AlxGa1−x As layer 10 (0<x≦1), on which an AlyGa1−yAs layer (0≦y≦1 and y<x) is provided as having a band gap smaller than that of the AlxGa1−xAs layer 10 and a valence band energy larger than that of the AlxGa1−xAs layer 10, when the AlyGa1−yAs layer is selectively etched, an Au electrode film 16 is formed on a surface of the AlyGa1−yAs layer outside an etching region 14, a resist pattern 18 is formed so as to cover the Au electrode film 16 and expose the etching region 14, and the AlyGa1−yAs layer is selectively removed through the mask of the resist pattern 18 under irradiation of light by use of an etching solution having a Fermi level higher than that of the AlyGa1−yAs layer.
    Type: Application
    Filed: January 31, 2002
    Publication date: November 28, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Zempei Kawazu, Tetsuya Yagi
  • Publication number: 20020075923
    Abstract: In fabricating a semiconductor laser 10 with an oscillation wavelength of 770 to 810 nm, impurities are introduced into an MQW active layer 16 near a light emitting facet of the laser to form a disordered region constituting a window layer 20. Pumped light is applied to the window layer 20 to generate photo luminescence whose wavelength &lgr; dpl (nm) is measured. A blue shift amount &lgr; bl (nm) is defined as the difference between the wavelength &lgr; apl (nm) of photo luminescence generated by application of pumped light to the active layer 16 on the one hand, and the wavelength &lgr; dpl (nm) of photo luminescence from the window layer 20 under pumped light irradiation on the other hand. The blue shift amount &lgr; bl is referenced during the fabrication process in order to predict COD levels of semiconductor laser products.
    Type: Application
    Filed: June 13, 2001
    Publication date: June 20, 2002
    Inventors: Yoshihisa Tashiro, Zempei Kawazu, Harumi Nishiguchi, Tetsuya Yagi, Akihiro Shima
  • Patent number: 5880485
    Abstract: A high-quality gallium nitride layer is grown on a surface of a substrate which is exposed through a dielectric mask on the substrate. The high-quality gallium nitride layer has a composition expressed by the chemical formula:Ga.sub.x Al.sub.y In.sub.z N (I)wherein 0<x.ltoreq.1, 0.ltoreq.y<1, 0.ltoreq.z<1, and x+y+z=1. An aluminum nitride thin layer is interposed between neighboring pairs of gallium nitride selectively grown layers and has a composition expressed by the following chemical formula:Al.sub.x Ga.sub.1-x N (II)wherein 0.7<x.ltoreq.1.
    Type: Grant
    Filed: September 11, 1997
    Date of Patent: March 9, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Diethard Marx, Zempei Kawazu, Yutaka Mihashi