Abstract: An image processing apparatus can execute appropriate image processing while preventing increase in a capacity of a memory for storing a plurality of pieces of image data of different frequency bands. The image processing apparatus stores first image data having the highest frequency among the plurality of pieces of image data of different frequency bands in a state in which each pixel of the first image data includes a color component signal of any of a plurality of colors, on the memory, and further stores second image data and third image data whose frequency bands are lower than that of the first image data on the memory, in a state in which a part of or all pixels of the second and the third image data have color component signals of a plurality of colors.

Abstract: Disclosed is a video signal processing apparatus applicable to various LCD panels. This video signal processing apparatus includes a format converting unit which converts first-format image data into second-format image data, a point sequential converting unit which converts the second-format image data into point sequenced data, a resizing unit which resizes the point sequenced data, a line memory which stores the resized point sequenced data, and an output control unit which controls to continuously read out the point sequenced data from the line memory.

Abstract: When a first display device displays image data, a display control apparatus reserves a memory space having the first horizontal pixel number in the storage unit, and sets the frequency of a clock signal supplied to the display control unit to a first frequency. When a second display device displays image data, a display control apparatus reserves a space of the second horizontal pixel number, which is higher than the first horizontal pixel number, and sets the frequency of a clock signal supplied to the display control unit to a second frequency which is higher than the first frequency.

Abstract: An image processing apparatus can execute appropriate image processing while preventing increase in a capacity of a memory for storing a plurality of pieces of image data of different frequency bands. The image processing apparatus stores first image data having the highest frequency among the plurality of pieces of image data of different frequency bands in a state in which each pixel of the first image data includes a color component signal of any of a plurality of colors, on the memory, and further stores second image data and third image data whose frequency bands are lower than that of the first image data on the memory, in a state in which a part of or all pixels of the second and the third image data have color component signals of a plurality of colors.

Abstract: In an image capturing apparatus with an operation mode for carrying out expression detection, it is determined whether or not the image capturing apparatus is operated in the operation mode for carrying out expression detection. In a case in which the image capturing apparatus is operated in the operation mode for carrying out expression detection, setting in such a way that images with a resolution higher than in a case in which the image capturing apparatus is not operated in the operation mode are read out from an image sensor allows the expression of a face of a person to be detected efficiently.

Abstract: When a first display device displays image data, a display control apparatus reserves a memory space having the first horizontal pixel number in the storage unit, and sets the frequency of a clock signal supplied to the display control unit to a first frequency. When a second display device displays image data, a display control apparatus reserves a space of the second horizontal pixel number, which is higher than the first horizontal pixel number, and sets the frequency of a clock signal supplied to the display control unit to a second frequency which is higher than the first frequency.

Abstract: When a first display device displays image data, a display control apparatus reserves a memory space having the first horizontal pixel number in the storage unit, and sets the frequency of a clock signal supplied to the display control unit to a first frequency. When a second display device displays image data, a display control apparatus reserves a space of the second horizontal pixel number, which is higher than the first horizontal pixel number, and sets the frequency of a clock signal supplied to the display control unit to a second frequency which is higher than the first frequency.

Abstract: An image sensing apparatus comprises an image sensing unit configured to sense an object and generate image data, a face detection unit configured to detect a face region of a person contained in the image data generated by the image sensing unit, and a facial expression determination unit configured to determine a plurality of facial expressions in the face region determined by the face detection unit. When both a first facial expression and a second facial expression are determined, the facial expression determination unit corrects a condition to determine the second facial expression so as to become difficult as compared to the determination condition when the first facial expression is not determined and the second facial expression is determined.

Abstract: An image processing apparatus comprises: a feature detection circuit adapted to detect a feature portion of an object from a sensed image; a blur amount detection circuit adapted to detect a blur amount, during image sensing, of a device adapted to obtain the sensed image; a display unit adapted to display the sensed image, and display a frame surrounding the feature portion of the object in the displayed sensed image; and a calculation circuit adapted to set a position, in the sensed image, of the frame surrounding the feature portion of the object, wherein the calculation circuit calculates, on the basis of the blur amount, a moving amount of the frame whose position in the sensed image is set on the basis of the feature portion detected by the feature detection circuit.

Abstract: An image sensing apparatus comprises an image sensing unit configured to sense an object and generate image data, a face detection unit configured to detect a face region of a person contained in the image data generated by the image sensing unit, and a facial expression determination unit configured to determine a plurality of facial expressions in the face region determined by the face detection unit. When both a first facial expression and a second facial expression are determined, the facial expression determination unit corrects a condition to determine the second facial expression so as to become difficult as compared to the determination condition when the first facial expression is not determined and the second facial expression is determined.

Abstract: In an image capturing apparatus with an operation mode for carrying out expression detection, it is determined whether or not the image capturing apparatus is operated in the operation mode for carrying out expression detection. In a case in which the image capturing apparatus is operated in the operation mode for carrying out expression detection, setting in such a way that images with a resolution higher than in a case in which the image capturing apparatus is not operated in the operation mode are read out from an mage sensor allows the expression of a face of a person to be detected efficiently.

Abstract: An image capturing apparatus having an auto focus function or an auto exposure function stores digital image data output from an A/D conversion unit as first image data directly or after performing predetermined processing, and stores the digital image data serving as a base of the first image data as second image data after performing predetermined processing for the digital image data. The apparatus then detects a face region from the second image data, and displays the image on the basis of the image data output from the A/D conversion unit while the face region is detected form the second image data. After completion of detection of the face region from the second image data, the apparatus extracts information for auto focus, auto exposure, or white balance by using, of the first image data, data at a portion corresponding to the face region that is detected by said face detection means, and performs auto focus control, auto exposure control, or white balance control.

Abstract: When a first display device displays image data, a display control apparatus reserves a memory space having the first horizontal pixel number in the storage unit, and sets the frequency of a clock signal supplied to the display control unit to a first frequency. When a second display device displays image data, a display control apparatus reserves a space of the second horizontal pixel number, which is higher than the first horizontal pixel number, and sets the frequency of a clock signal supplied to the display control unit to a second frequency which is higher than the first frequency.

Abstract: An image processing apparatus comprises: a feature detection circuit adapted to detect a feature portion of an object from a sensed image; a blur amount detection circuit adapted to detect a blur amount, during image sensing, of a device adapted to obtain the sensed image; a display unit adapted to display the sensed image, and display a frame surrounding the feature portion of the object in the displayed sensed image; and a calculation circuit adapted to set a position, in the sensed image, of the frame surrounding the feature portion of the object, wherein the calculation circuit calculates, on the basis of the blur amount, a moving amount of the frame whose position in the sensed image is set on the basis of the feature portion detected by the feature detection circuit.

Abstract: Disclosed is a video signal processing apparatus applicable to various LCD panels. This video signal processing apparatus includes a format converting unit which converts first-format image data into second-format image data, a point sequential converting unit which converts the second-format image data into point sequenced data, a resizing unit which resizes the point sequenced data, a line memory which stores the resized point sequenced data, and an output control unit which controls to continuously read out the point sequenced data from the line memory.

Abstract: An image pickup apparatus which increases the rate at which a person's face is detected in electronic zoom and accurately focuses on a person's face area and provides exposure/white balance control. An A/D converting unit converts an analog signal obtained from an image pickup device into a digital image signal. A signal processing unit performs signal processing on the digital image signal as image data. A display unit displays a zoom area in the image data magnified/reduced to a desired angle of view. A face detecting unit detects a person's face area from image data of a face detecting area narrower than the whole area of the image data and wider than the zoom area to acquire information on the person's face area.

Abstract: An image capturing apparatus having an auto focus function or an auto exposure function stores digital image data output from an A/D conversion unit as first image data directly or after performing predetermined processing, and stores the digital image data serving as a base of the first image data as second image data after performing predetermined processing for the digital image data. The apparatus then detects a face region from the second image data, and displays the image on the basis of the image data output from the A/D conversion unit while the face region is detected form the second image data. After completion of detection of the face region from the second image data, the apparatus extracts information for auto focus, auto exposure, or white balance by using, of the first image data, data at a portion corresponding to the face region that is detected by said face detection means, and performs auto focus control, auto exposure control, or white balance control.

Abstract: Complementary signals on a pair of first signal lines are transferred onto a pair of second signal lines in synchronization with a clock signal by a buffer circuit. The buffer circuit includes an equalize circuit to equalize a pair of internal nodes to a prescribed potential, a transfer gate circuit activated, when the equalize circuit completes equalization, to couple the pair of first signal lines and the pair of internal nodes, an amplifier circuit to differentially amplify the signals on the internal nodes when the transfer gate completes the transfer operation, an output transfer circuit to transmit the signals on the pair of internal nodes onto the pair of second signal lines in synchronization with the clock signal, and a control circuit to control the operation of the equalize circuit, the transfer gate circuit and the amplifier circuit. After the pair of internal nodes is equalized to the prescribed potential, the signals from the pair of first signal lines are received and amplified.

Abstract: A command decoder receives an externally supplied command independently of an internal clock signal, decodes the command, generates a column access mode instruction signal, and activates a column address activation signal when the internal clock signal rises. An internal column address signal generating circuit generates an internal column address signal from an externally supplied address signal according to the column address activation signal. Accordingly, the internal column address is generated at an advanced timing to enable a following column selecting operation to be started at a faster timing. A synchronous semiconductor memory device capable of performing the column selecting operation at a high speed is thus provided.

Abstract: A command decoder receives an externally supplied command independently of an internal clock signal, decodes the command, generates a column access mode instruction signal, and activates a column address activation signal when the internal clock signal rises. An internal column address signal generating circuit generates an internal column address signal from an externally supplied address signal according to the column address activation signal. Accordingly, the internal column address is generated at an advanced timing to enable a following column selecting operation to be started at a faster timing. A synchronous semiconductor memory device capable of performing the column selecting operation at a high speed is thus provided.