Patents by Inventor Zeshan Ahmad

Zeshan Ahmad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250012893
    Abstract: An integrated circuit includes a passive component having first and second metal segments defining an interior area; and spaced metal fill lines disposed in the interior area. Each metal fill line of the spaced metal fill lines is configured to carry a current in a same direction and in a different direction than a current carried by at least one of the first and second metal segments. Systems are also provided.
    Type: Application
    Filed: September 16, 2024
    Publication date: January 9, 2025
    Inventors: Zeshan AHMAD, Samala SREEKIRAN
  • Patent number: 12117556
    Abstract: An integrated circuit includes a passive component having a first metal feature and a second metal feature, the first metal feature and the second metal feature defining an interior area therebetween. The integrated circuit also includes set of spaced metal fill lines extending across the interior area and oriented to carry current orthogonal to current carried by the first metal feature and second metal feature.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: October 15, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Zeshan Ahmad, Samala Sreekiran
  • Publication number: 20240248169
    Abstract: In an embodiment, a system includes: an analog-to-digital converter (ADC); a transmitter path; a receiver path including a first amplifier including: an output coupled to the ADC, and a first high-pass filter; and a controller coupled to the transmitter path and to the receiver path, where the controller is configured to: cause a corner frequency of the first high-pass filter to increase from a first value to a second value, simultaneously or after causing the corner frequency of the first high-pass filter to increase, cause the transmitter path to be enabled, and after a first signal begins transmission in the enabled transmitter path, and during transmission of the first signal in the enabled transmitter path, cause the corner frequency of the first high-pass filter to decrease from the second value to the first value.
    Type: Application
    Filed: January 20, 2023
    Publication date: July 25, 2024
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Zeshan Ahmad, Mayank Kumar Singh
  • Publication number: 20240250646
    Abstract: In an embodiment, a system includes: an analog-to-digital converter (ADC); a receiver path including a transimpedance amplifier having an output coupled to the ADC; and a controller coupled to the receiver path and configured to, upon detection of a jamming event of the receiver path, cause an increase in a transconductance of the transimpedance amplifier from a first transconductance value to a second transconductance value.
    Type: Application
    Filed: January 20, 2023
    Publication date: July 25, 2024
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Zeshan Ahmad, Mayank Kumar Singh
  • Publication number: 20220413091
    Abstract: An integrated circuit includes a passive component having a first metal feature and a second metal feature, the first metal feature and the second metal feature defining an interior area therebetween. The integrated circuit also includes set of spaced metal fill lines extending across the interior area and oriented to carry current orthogonal to current carried by the first metal feature and second metal feature.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: Zeshan AHMAD, Samala SREEKIRAN
  • Patent number: 10692862
    Abstract: An accumulation-mode MOS varactor is formed with a standard CMOS process and having an anti-symmetric-CV curve. The asymmetric varactor (ASVAR) can efficiently generate even-order harmonics while simultaneously suppressing odd-order harmonics over broad bandwidths. This is achieved without degradation of dynamic cut-off frequency. The improved cut-off frequency of the asymmetric varactor results in efficient even-harmonic generation well into sub-millimeter or terahertz frequencies. This and the inherent adaptive-CV features of the asymmetric varactor result in even-harmonic generation with process variation resilience and can also be utilized for frequency response shaping and for optimizing performance at various driving conditions.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: June 23, 2020
    Inventors: Zeshan Ahmad, Kenneth K. O
  • Publication number: 20180211954
    Abstract: An accumulation-mode MOS varactor is formed with a standard CMOS process and having an anti-symmetric-CV curve. The asymmetric varactor (ASVAR) can efficiently generate even-order harmonics while simultaneously suppressing odd-order harmonics over broad bandwidths. This is achieved without degradation of dynamic cut-off frequency. The improved cut-off frequency of the asymmetric varactor results in efficient even-harmonic generation well into sub-millimeter or terahertz frequencies. This and the inherent adaptive-CV features of the asymmetric varactor result in even-harmonic generation with process variation resilience and can also be utilized for frequency response shaping and for optimizing performance at various driving conditions.
    Type: Application
    Filed: January 26, 2018
    Publication date: July 26, 2018
    Applicant: Board of Regents, The University of Texas System
    Inventors: Zeshan Ahmad, Kenneth K. O