Patents by Inventor Zeyang LIAN

Zeyang LIAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hole connecting layer manufacturing method, circuit board manufacturing method and circuit board
    Patent number: 11083091
    Abstract: Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: August 3, 2021
    Assignees: GUANGZHOU FASTPRINT CIRCUIT TECH CO., LTD., SHENZHEN FASTPRINT CIRCUIT TECH CO., LTD., YIXING SILICON VALLEY ELECTRONICS TECH CO., LTD.
    Inventors: Zeyang Lian, Sen Wu, Yanguo Li, Bei Chen
  • HOLE CONNECTING LAYER MANUFACTURING METHOD, CIRCUIT BOARD MANUFACTURING METHOD AND CIRCUIT BOARD
    Publication number: 20200315031
    Abstract: Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.
    Type: Application
    Filed: December 29, 2017
    Publication date: October 1, 2020
    Inventors: Zeyang LIAN, Sen WU, Yanguo LI, Bei CHEN