Patents by Inventor Zhan Duan

Zhan Duan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10135548
    Abstract: An apparatus, system, and method are provided for at least mitigating a signal reflection. Included is a filter configured to receive a data signal for transmission, and filter the data signal to generate a filtered data signal. Also included is a gain regulator in electrical communication with the filter. The gain regulator is configured to receive the filtered data signal for adjusting a gain of the filtered data signal to generate a gain regulator output signal for use in at least mitigating a signal reflection. Further, a controller is provided in electrical communication with the filter and the gain regulator. The controller is configured to receive the filtered data signal, and process the filtered data signal to generate at least one controller output signal for use in controlling the filter and the gain regulator.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: November 20, 2018
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Hiroshi Takatori, Zhan Duan, Purackal M. Mammen
  • Patent number: 9917663
    Abstract: An apparatus, system, and method are provided for configuring a serializer/deserializer (SerDes) based on evaluation of a probe signal. Included is circuitry configured to detect at least one of a probe signal or a reflection resulting from the probe signal. Such probe signal and/or reflection is evaluated such that at least one configurable aspect of the apparatus may be set, based on the evaluation.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: March 13, 2018
    Assignee: Futurewei Technologies, Inc.
    Inventors: Hiroshi Takatori, Kevin Zheng, Zhan Duan
  • Publication number: 20180048396
    Abstract: An apparatus, system, and method are provided for at least mitigating a signal reflection. Included is a filter configured to receive a data signal for transmission, and filter the data signal to generate a filtered data signal. Also included is a gain regulator in electrical communication with the filter. The gain regulator is configured to receive the filtered data signal for adjusting a gain of the filtered data signal to generate a gain regulator output signal for use in at least mitigating a signal reflection. Further, a controller is provided in electrical communication with the filter and the gain regulator. The controller is configured to receive the filtered data signal, and process the filtered data signal to generate at least one controller output signal for use in controlling the filter and the gain regulator.
    Type: Application
    Filed: August 9, 2016
    Publication date: February 15, 2018
    Inventors: Hiroshi Takatori, Zhan Duan, Purackal M. Mammen
  • Publication number: 20180048401
    Abstract: An apparatus, system, and method are provided for configuring a serializer/deserializer (SerDes) based on evaluation of a probe signal. Included is circuitry configured to detect at least one of a probe signal or a reflection resulting from the probe signal. Such probe signal and/or reflection is evaluated such that at least one configurable aspect of the apparatus may be set, based on the evaluation.
    Type: Application
    Filed: August 9, 2016
    Publication date: February 15, 2018
    Inventors: Hiroshi Takatori, Kevin Zheng, Zhan Duan
  • Patent number: 7388358
    Abstract: A pulse width modulated pulse signal is generated and its duty cycle adjusted according to at least two different schedules, for example, a coarse tuning cycle and a fine tuning cycle. The target duty cycle is derived according to an offset between output voltage and target voltage, as well as the rate of changes in the offset. In the coarse tuning cycle, large changes in the control signal pulse width is used to drive output voltage to target at a fast pace. As output voltage approaches target voltage, smaller adjustment are made to the duty cycle of the control pulse width in the fine tuning cycle. The rate of pulse width change is also taken into consideration, to further improve operation of the DC-DC converter.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: June 17, 2008
    Assignee: Winbond Electronics Corporation
    Inventor: Zhan Duan
  • Publication number: 20070268009
    Abstract: A pulse width modulated pulse signal is generated and its duty cycle adjusted according to at least two different schedules, for example, a coarse tuning cycle and a fine tuning cycle. The target duty cycle is derived according to an offset between output voltage and target voltage, as well as the rate of changes in the offset. In the coarse tuning cycle, large changes in the control signal pulse width is used to drive output voltage to target at a fast pace. As output voltage approaches target voltage, smaller adjustment are made to the duty cycle of the control pulse width in the fine tuning cycle. The rate of pulse width change is also taken into consideration, to further improve operation of the DC-DC converter.
    Type: Application
    Filed: May 17, 2006
    Publication date: November 22, 2007
    Applicant: Winbond Electronics Corporation
    Inventor: Zhan Duan
  • Patent number: 6882136
    Abstract: An impedance network, which includes at least one end terminal, a wiper terminal, a center impedance element, and a first plurality of impedance elements. The wiper terminal provides a tap position at a selected impedance value of the impedance network, selectable at a specified increment value. The first plurality of impedance elements is configured to reduce resistance variation during switching from one tap position to another tap position. The first plurality of impedance element is connected in series in a mirrored configuration about the center impedance element.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: April 19, 2005
    Assignee: Winbond Electronics Corporation
    Inventors: Hagop A. Nazarian, William Tang, Zhan Duan, Chao-Ming Tsai, Lawrence D. Engh
  • Publication number: 20040217751
    Abstract: An impedance network, which includes at least one end terminal, a wiper terminal, a center impedance element, and a first plurality of impedance elements. The wiper terminal provides a tap position at a selected impedance value of the impedance network, selectable at a specified increment value. The first plurality of impedance elements is configured to reduce resistance variation during switching from one tap position to another tap position. The first plurality of impedance elements is connected in series in a mirrored configuration about the center impedance element.
    Type: Application
    Filed: May 26, 2004
    Publication date: November 4, 2004
    Inventors: Hagop A. Nazarian, William Tang, Zhan Duan, Chao-Ming Tsai, Lawrence D. Engh
  • Patent number: 6788042
    Abstract: An impedance network, which includes at least one end terminal, a wiper terminal, a center impedance element, and a first plurality of impedance elements. The wiper terminal provides a tap position at a selected impedance value of the impedance network, selectable at a specified increment value. The first plurality of impedance elements is configured to reduce resistance variation during switching from one tap position to another tap position. The first plurality of impedance elements is connected in series in a mirrored configuration about the center impedance element.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: September 7, 2004
    Assignee: Winbond Electronics Corporation
    Inventors: Hagop A. Nazarian, William Tang, Zhan Duan, Chao-Ming Tsai, Lawrence D. Engh
  • Publication number: 20030111992
    Abstract: An impedance network, which includes at least one end terminal, a wiper terminal, a center impedance element, and a first plurality of impedance elements. The wiper terminal provides a tap position at a selected impedance value of the impedance network, selectable at a specified increment value. The first plurality of impedance elements is configured to reduce resistance variation during switching from one tap position to another tap position. The first plurality of impedance elements is connected in series in a mirrored configuration about the center impedance element.
    Type: Application
    Filed: March 20, 2002
    Publication date: June 19, 2003
    Inventors: Hagop A. Nazarian, William Tang, Zhan Duan, Chao-Ming Tsai, Lawrence D. Engh