Abstract: A computer-implemented method for managing information during a web conference is provided. The computer-implemented method includes collecting and formatting meeting application information at a processor of a computing device having a screen being shared with attendees of the web conference and collecting and formatting to-be-popup application information at the processor. The computer-implemented method further includes analyzing, by the processor, an urgency of the to-be-popup application information and a correlation between the to-be-popup application information and the meeting application information and determining, by the processor, whether to share the to-be-popup application information with a user of the computing device and with the attendees based on results of the analyzing.

Abstract: Disclosed are methods for encrypting communications with a remote endpoint via a memory device. In one embodiment, a memory device is configured to receive, from the application, a request to establish a communications session with a remote computing device, establish a shared symmetric key, the shared symmetric key shared between the memory device and the remote computing device, receive a message from the application, the message including an identifier of the remote computing device and a payload, generate a ciphertext using the symmetric key and the payload, and return the ciphertext to the application.

Abstract: The disclosed embodiments relate to securely booting firmware images. In one embodiment, a method is disclosed comprising receiving, by a memory device, a firmware update; validating, by the memory device, a signature associated with the firmware update; copying, by the memory device, an existing firmware image to an archive location, the archive location storing a plurality of firmware images sorted by version identifiers; booting, by the memory device, and executing the firmware update; and replacing, by the memory device, the firmware update with the existing firmware image stored in the archive location upon detecting an error while booting the firmware update.

Abstract: A display substrate includes: a base substrate (100); a plurality of sub-pixels (R, G, B) located on the base substrate (100), every two rows of sub-pixels (R, G, B) constituting a pixel group; a plurality of first gate lines (Gate1) located at first row gaps between the pixel groups, two first gate lines (Gate1) being arranged at each first row gap; and a plurality of photosensors (101), the orthographic projection of each row of photosensors (101) on the base substrate (100) completely covering a second row gap in the pixel group and partially overlapping with the orthographic projections of the sub-pixels (R, G, B), thereby avoiding the bright and dark difference between adjacent rows and ensuring the aperture ratio.

Abstract: A semiconductor device manufacturing method includes: providing a semiconductor base; patterning the first medium layer to form a groove extending along the base in the base; forming a first auxiliary layer and a first metal layer sequentially in the groove, where the first metal layer is located on the side of the first auxiliary layer towards the first medium layer; thinning the base on the second surface of the base to expose the first auxiliary layer; removing the first auxiliary layer to form a first opening; and forming a second metal layer on the second surface of the base, where the second metal layer fills the first opening.

Abstract: The present disclosure relates to the field of communication technologies, and provide a near-field communication (NFC) chip, a phase synchronization method, and an electronic device, to quickly synchronize a transmitted signal of an NFC card device with a carrier of an NFC card reader. The NFC chip includes a processing circuit configured to: determine a first carrier frequency offset between a local clock signal and a carrier clock signal, and generate a first frequency control word based on the first carrier frequency offset. The carrier clock signal is determined based on a received signal received by the NFC chip. The NFC chip further includes a phase-locked loop configured to generate a first clock signal based on the local clock signal and the first frequency control word.

Abstract: Provided is an array substrate. The array substrate includes: a base substrate, and a plurality of gate lines, a plurality of data lines, a plurality of sub-pixels and a plurality of touch signal lines disposed on the base substrate. The data lines have a plurality of first extending parts and a plurality of second extending parts which are in an alternating arrangement. When the array substrate is used to prepare a liquid crystal display panel and the liquid crystal display panel is displaying, in each column of the sub-pixels, the voltage polarities of the two adjacent sub-pixels which respectively belong to two adjacent first pixel regions are opposite.

Abstract: An array substrate and display device are provided. The array substrate includes a base substrate, and gate lines, data lines, compensation blocks and sub-pixels located on the base substrate. Two gate lines are arranged between two adjacent rows of sub-pixels. The data lines are provided with multiple first extensions and second extensions arranged alternately. The extending direction of the first extensions intersects with the extending direction of the second extensions.

Abstract: Embodiments provide a method for packaging a semiconductor, a semiconductor package structure, and a package. The packaging method includes: providing a substrate wafer having a first surface and a second surface arranged opposite to each other, the first surface having a plurality of grooves, a plurality of electrically conductive pillars being provided at a bottom of the groove, and the electrically conductive pillar penetrating through the bottom of the groove to the second surface; providing a plurality of semiconductor die stacks; placing the semiconductor die stack in the groove; and filling an insulating dielectric in a gap between a sidewall of the groove and the semiconductor die stack to form an insulating dielectric layer covering an upper surface of the semiconductor die stack to seal up the semiconductor die stack so as to form the semiconductor package structure.

Abstract: Embodiments of this application provide a method and system for adjusting a memory, and a semiconductor device. The method for adjusting a memory includes: acquiring a mapping relationship among a temperature of a transistor, a substrate bias voltage of a sense amplification transistor in a sense amplifier, and an actual data writing time of the memory; acquiring a current temperature of the transistor; and adjusting the substrate bias voltage on the basis of the current temperature and the mapping relationship, such that an actual data writing time corresponding to an adjusted substrate bias voltage is within a preset writing time.

Abstract: A read/write method includes: applying a read command to a memory device, the read command pointing to address information, reading to-be-read data from a storage cell corresponding to the address information to which the read command points, and if an error occurs in the to-be-read data, storing the address information to which the read command points in a preset storage space. The read/write operation is not performed on the address information stored in the preset storage space when the user executes the read or write operation on the memory device, which avoids a data error or data loss and greatly improves the reliability and prolongs the service life of the memory device.

Abstract: The disclosed embodiments relate to authenticating devices to a cellular network. In one embodiment, a method is disclosed comprising reading a mobile identifier from a storage area of a memory device, the mobile identifier comprising a value associated with a subscriber of a cellular network; signing the mobile identifier using a private key to generate a digital signature, the private key generated using a physically unclonable function (PUF); transmitting the digital signature and a public key to a cellular network, the public key associated with the private key; and receiving, from the cellular network, a confirmation of access to the cellular network, the confirmation generated based on the public key and the digital signature.

Abstract: In some aspects, the techniques described herein relate to a device including: a debug port; a trusted execution environment (TEE), the TEE storing a public key; and a controller, the controller configured to: receive a command to access the debug port, the command including a signature generated using a private key corresponding to the public key; provide the command to the TEE, wherein the TEE validates the command by validating the signature using the public key to obtain a validation result; and modify access to the debug port based on the validation result.

Abstract: In some aspects, the techniques described herein relate to a method including: generating a digital certificate using a public key of a secure environment; storing the digital certificate in a storage device of a cloud service; generating, by the secure environment, a signed command to access the storage device, the signed command signed using a private key corresponding to the public key of the secure environment; and issuing the signed command to the storage device to access data stored by the storage device.

Abstract: In some aspects, the techniques described herein relate to a method including: transmitting, by a user device, a public key of a client device to a key management server (KMS); generating, by the KMS, a digital certificate using the public key of the client device; storing the digital certificate in a storage device of a cloud service; generating, by the client device, a signed command to access the storage device, the signed command signed using a private key corresponding to the public key of the client device; and issuing the signed command to the storage device to access data stored by the storage device.

Abstract: In some aspects, the techniques described herein relate to a device including: a processor; and a storage medium for tangibly storing thereon logic for execution by the processor, the logic including instructions for: storing a group digital certificate, the group digital certificate including a plurality of unique identifier (UID) values and a plurality of corresponding public keys; receiving onboarding data and a digital signature from a client device, the onboarding data including a UID of the client device and a public key of the client device and the digital signature generated using the onboarding data and a private key corresponding to the public key; validating the digital signature using the public key; confirming that the UID matches at least one UID in the group digital certificate; and onboarding the client device.

Abstract: In some aspects, the techniques described herein relate to a device including: a storage device, the storage device including a first physically unclonable function (PUF) and configured to generate a storage device public key and a storage device private key; and a secure environment, the secure environment including a controller configured for: transmitting a nonce value to the storage device; receiving a response from the storage device, the response including a unique identifier (UID) and a digital signature, the digital signature generated using the UID and the nonce value; validating the digital signature using a public key of the storage device; and issuing a command to the storage device after validating the digital signature.

Abstract: The embodiments provide a method for reading and writing and a memory device. The method includes: applying a read command to the memory device, the read command pointing to address information; reading data to be read out from a memory cell corresponding to the address information pointed to by the read command; and storing the address information pointed to by the read command into a preset memory space if an error occurs in the data to be read out, and backing up the address information stored in the preset memory space into a non-volatile memory cell according to a preset rule.

Abstract: A memory is provided. The memory includes: a control chip; and a plurality of storage chips, in which the plurality of storage chips are electrically connected with the control chip via a common communication channel, the plurality of storage chips are configured to perform information interaction with the control chip by adopting different clock edges of a first clock signal, the first clock signal has a first clock cycle, the different clock edges include two consecutive rising edges and/or two consecutive falling edges, the plurality of storage chips are further configured to receive a second clock signal and distinguish the different clock edges based on the second clock signal, and a second clock cycle of the second clock signal is greater than the first clock cycle.

Abstract: In some aspects, the techniques described herein relate to a system including: a storage array; a controller configured to detect a shutdown event; and an auto-measure circuit configured to: generate a plurality of measurements corresponding to a plurality of layers of a boot sequence, each layer including executable code used to generate a respective measurement; compare the plurality of measurements to a respective plurality of golden measurements; update flags associated with the plurality of layers based on the comparing; and instruct the controller to shut down the system after updating the flags.