Abstract: A data encoding system for a data stream comprises an interleaving module that receives the data stream as N bit data blocks and that reverses positions of at least two of the N bits of selected ones of the data blocks. A generating module generates P error checking bits for each of the N bit data blocks. An insertion module receives the P error checking bits from the generating module and inserts the P error checking bits into the corresponding data block received from the interleaving module.

Abstract: A radio receiving apparatus and method of using thereof, in which the radio receiving apparatus includes a first synchronization circuit, a second synchronization circuit, and a demodulation section that demodulates an incoming signal based on one of synchronization information output from the first synchronization circuit and synchronization information output from the second synchronization circuit, the first synchronization circuit including a first correlation section that determines a correlation between the incoming signal and a first pulse template received as input at a timing corresponding to a first reference signal, the second synchronization circuit including a second correlation section that determines a correlation between the incoming signal and a second pulse template received as input at a timing corresponding to a second reference signal, and the first pulse template having a longer width than a width of the second pulse template.

Abstract: A data dependent scrambler for a communications channel that receives a user data sequence including N symbols and host cyclic redundancy check (CRCU) bits comprises a data buffer that receives the user data sequence and the host CRCU bits. A seed finder generates a scrambling seed that is dependent upon the symbols in the user data sequence. A first scrambler receives the user data sequence from the data buffer and the scrambling seed from the seed finder and generates the scrambled user data sequence. A second scrambler generates a difference sequence that is based on the user data sequence and the scrambled user data sequence.

Abstract: A receiver in an impulse wireless communication. The receiver (300) includes a pulse-pair correlator (304) that receives a signal (316) and divides it into two signals for paths. One of the signals is input to signal multiplier (312) while another signal is delayed by a delay unit (310). The signal multiplier (312) multiplies the received signal (316) by a delayed signal (318). An integrator (314) integrates an output signal (322) over a designated period of time. An adding module (306) sums an output signal (324) from the integrator (314). An acquiring module (308) compares an summing-up output (326) from the adding module (306) with a predetermined threshold value to detect the existence of a transmitting-standard preamble.

Abstract: An adaptive beacon coordination method in a communication network using signal formats mutually incompatible. A coordination device broadcasts a first beacon in a first signal format and a second beacon in a second signal format in a superframe. The first and second beacons are used to send medium access information to a client device having the first signal format and a client device having the second signal format, respectively. When there are three or more signal formats in a network, the coordination device can broadcast three or more beacons. The number of beacons can be adapted to various superframes according to the functions of all the client devices in the network. If all the client devices support a signal format, the coordination device broadcasts only a single beacon in the signal format. After a predetermined number of superframes, the coordination device again starts to broadcast beacons so that new client devices having different respective signal formats can join the network.

Abstract: A wireless communication method, a radio transmitter apparatus and a radio receiver apparatus wherein a signal sequence, which is used in a reception process using a first modulation scheme and can be generated from a signal sequence prepared for a reception process and used in a second modulation scheme, is employed, thereby achieving a performance to a similar extent to the reception process performance using the second modulation scheme. A radio transmitter apparatus (20) uses a first modulation scheme (e.g., OOK modulation scheme) to sequentially transmit, as a first sequence, both a sub-sequence a1(n), which is identical with a second sequence a(n) designed for use in a second modulation scheme (e.g., BPSK modulation scheme), and a sub-sequence a2(n), the bits of which are reverse to those of the second sequence a(n), in a time division manner.

Abstract: A seed generator for a scrambler comprises a seed set identifier that identifies a seed set based on received user data symbols, which include a plurality of M-bit symbols. A seed selector selects a scrambling seed for the scrambler from the seed set based on Hamming distances between at least two of the M-bit symbols in the seed set.

Abstract: A radio receiving apparatus and a radio receiving method wherein synchronization is established at a high speed with high reliability.

Abstract: A synchronization acquiring device and method for realizing synchronization acquisition at high speed equivalent to that of parallel search with a simple constitution similar to that of series search. A synchronization acquiring device (100) has a superposition template acquiring section (120) for acquiring superposition template signals generated by superposing template signals on one another, a first correlation detecting section (110) for detecting preliminary correlation matching between a superposition template signal and the received signal and, if the preliminary correlation matching is not detected, detects preliminary correlation matching after replacing the superposition template signal with another superposition template signal, and a second correlation detecting section (130) detects, if preliminary correlation matching is detected, the final correlation matching between a superposition template signal out of the template signals and the received signal.

Abstract: Methods, software, receivers and systems for communicating information over a cyclostationary channel. The method generally includes interleaving sections of a control sequence with bits of the information. The software and receivers are generally configured to implement one or more aspects of the methods disclosed herein, and the systems generally include those that embody the inventive receivers disclosed herein. The present invention is particularly useful in powerline channels, where certain parameters (such as noise) have time-dependent or periodic variations in value. By distributing the control sequence, the incidence of carrier recovery is reduced, the likelihood of successful packet or frame transmissions is increased, and data may be more reliably communicated.

Abstract: A receiver in an impulse wireless communication. The receiver (300) includes a pulse-pair correlator (304) that receives a signal (316) and divides it into two signals for paths. One of the signals is input to signal multiplier (312) while another signal is delayed by a delay unit (310). The signal multiplier (312) multiplies the received signal (316) by a delayed signal (318). An integrator (314) integrates an output signal (322) over a designated period of time. An adding module (306) sums an output signal (324) from the integrator (314). An acquiring module (308) compares an summing-up output (326) from the adding module (306) with a predetermined threshold value to detect the existence of a transmitting-standard preamble.

Abstract: A synchronization acquiring device and method for realizing synchronization acquisition at high speed equivalent to that of parallel search with a simple constitution similar to that of series search. A synchronization acquiring device (100) has a superposition template acquiring section (120) for acquiring superposition template signals generated by superposing template signals on one another, a first correlation detecting section (110) for detecting preliminary correlation matching between a superposition template signal and the received signal and, if the preliminary correlation matching is not detected, detects preliminary correlation matching after replacing the superposition template signal with another superposition template signal, and a second correlation detecting section (130) detects, if preliminary correlation matching is detected, the final correlation matching between a superposition template signal out of the template signals and the received signal.

Abstract: A data encoding system for a data stream comprises an interleaving module that receives the data stream as N bit data blocks and that reverses positions of at least two of the N bits of selected ones of the data blocks. A generating module generates P error checking bits for each of the N bit data blocks. An insertion module receives the P error checking bits from the generating module and inserts the P error checking bits into the corresponding data block received from the interleaving module.

Abstract: An low power vector summation apparatus is provided for using 2's complement arithmetic without the high switching activity of the prior art. In particular, the invention operates to exploit the sign-extension property of a 2's complement number. A reduced representation for 2's complement numbers is provided to avoid sign-extension and the switching of sign-extension bits. The maximum magnitude of a 2's complement number is detected and its reduced representation is dynamically generated to represent the signal. A constant error introduced by the reduced representation is also dynamically compensated.

Abstract: A Reed-Solomon decoder includes an inversionless Berlekamp-Massey algorithm (iBMA) circuit with a pipelined feedback loop. A first polynomial generator generates error locator polynomial values. A discrepancy generator generates discrepancy values based on the error locator polynomial values and the scratch polynomial values. Arithmetic units are used to generate the discrepancy values are also used to generate the error locator polynomial to reduce circuit area. A first delay circuit delays the discrepancy values. A feedback loop feeds back the delayed discrepancy values to the error locator polynomial generator. An error location finder circuit communicates with the iBMA circuit and identifies error locations. An error value computation circuit communicates with at least one of the error location finder circuit and the iBMA circuit and generates error values.

Abstract: A communications channel comprises a seed selector that selectively removes X M-bit symbols of user data from a seed set comprising Y M-bit symbols and that selects a scrambling seed from Y-X symbols remaining in the seed set, where X, Y and M are integers greater than one. A Hamming weight coding device that determines a Hamming weight of symbols of scrambled user data that are generated based on the user data and the selected scrambling seed and that selectively codes the symbols depending upon the determined Hamming weight.

Abstract: A system for detecting errors in received input data includes a first error detection circuit. The first error detection circuit is configured to receive the input data. The input data includes at least one of data and data with errors. The first error detection circuit is configured to generate a first error detection sequence in a first order. The system includes a second error detection circuit. The second error detection circuit is configured to receive the first error detection sequence and an error sequence. The error sequence is received in a second order that is different from the first order when there is data with errors. The second error detection circuit is configured to generate a second error detection sequence that indicates whether the error sequence is generated correctly.

Abstract: An error correcting Reed-Solomon decoder includes an error locator polynomial generator that generates an error locator polynomial and a scratch polynomial based on an inversionless Berlekamp-Massey algorithm (iBMA). An error location finder communicates with the error locator polynomial generator and generates error locations. An error values finder communicates with the error locator polynomial generator and generates error values directly from the error locator polynomial and the scratch polynomial.

Abstract: A communications channel that receives a user data sequence including N symbols and that supports host CRC includes a host bus interface (HBI) that generates cyclic redundancy check (CRCU) bits based on the user data sequence. A data dependent scrambler (DDS) receives the user data sequence and the CRCU bits and generates a scrambling seed. The DDS generates a scrambled user data sequence that is based on the user data sequence and the scrambling seed and generates a difference sequence.

Abstract: An enhanced Booth-encoded adder-array multiplier where the low transition probability partial-products are generated and the adder array has been reorganized to reduce power dissipation when the Booth-encoded input has a large dynamic range. The architecture does not require extra circuits or routing overhead. Power dissipation is reduced by ordering the sequence of partial-product additions such that an increasing sequence of “transition probabilities” is encountered.