Abstract: The present application provides an array substrate, a manufacturing method of the array substrate, and a liquid crystal display panel. The array substrate includes first common wirings disposed in a same layer as gate wirings and formed as discontinuous segments, and second common wirings disposed in a same layer as source/drain wirings. The first common wirings are electrically connected to the second common wirings. More openings are provided between the gate wirings and the first common wirings formed as discontinuous segments for a flow of an etchant, so that the first common wirings and the gate wirings are prevented from being formed too thin or broken due to an accumulation of the etchant.

Abstract: An embodiment of the present invention discloses a display substrate and a display panel. The display substrate includes a plurality of first display portions each of which is disposed in a gap between adjacent two of first limiting portions; a plurality of second display portions each of which is disposed in a gap between adjacent two of second limiting portions. The gap between the adjacent two first limiting portions is greater than the gap between the adjacent two second limiting portions. A difference between a height of a top of each of the second display portions and a height of a top of each of the first display portions is less than a predetermined difference.

Abstract: An embodiment of the present invention discloses a display substrate and a display panel. The display substrate includes a plurality of first display portions each of which is disposed in a gap between adjacent two of first limiting portions; a plurality of second display portions each of which is disposed in a gap between adjacent two of second limiting portions. The gap between the adjacent two first limiting portions is greater than the gap between the adjacent two second limiting portions. A difference between a height of a top of each of the second display portions and a height of a top of each of the first display portions is less than a predetermined difference.

Abstract: An array substrate used for a touch display screen is provided. The array substrate comprises a substrate; a polysilicon layer disposed on the substrate; a dielectric layer disposed on the polysilicon layer and the substrate; a touch line, a connecting line and data line arranged sequentially at intervals on the dielectric layer; a planarization layer covering the connecting line and data line; wherein a first through-hole and second through-hole arranged sequentially at intervals are formed on planarization layer, the touch line is facing and exposed from first through-hole; a portion of the connecting line is facing and exposed from second through-hole; a source and drain in contact with a portion of the surface of polysilicon layer are formed in dielectric layer arranged at intervals, the drain and source are respectively connected with the connecting line and data line, and the first through-hole is completely misplaced with the second through-hole.

Abstract: The present disclosure provides an array substrate and a method of manufacturing the same. The array substrate includes a substrate, a buffer layer, an active layer, a gate insulating layer with a second via hole, a gate, an interlayer insulating layer with a first via hole, a source electrode contacting the active layer through the first and second via holes, a planarization layer with a third via hole, a common electrode with a fourth via hole and a passivation layer sequentially disposed on the substrate, and a pixel electrode disposed on the passivation layer contacts the active layer through a fifth via hole passing through the fourth and third via holes, the interlayer insulating layer, and the gate insulating layer. According to present disclosure, static electricity generated in manufacturing is effectively prevented from being transferred to the active layer to cause Electro-Static discharge, which further improves the product quality.

Abstract: An array substrate used for a touch display screen is provided.

Abstract: Disclosed is a display panel and a display device. The display panel includes an array substrate, a color filter substrate and a liquid crystal layer. A plurality of parallel gate lines is disposed on the array substrate. The liquid crystal layer is disposed between the array substrate and the color filter substrate. The liquid crystal layer has a thickness gradually decreasing along a direction from an output near-end to an output far-end of the gate line. Display uniformity of a panel can be improved by the display panel and the display device.

Abstract: The present invention provides a manufacture method of a Low Temperature Poly-silicon TFT substrate and a Low Temperature Poly-silicon TFT substrate, in which by locating one heat sink layer under the amorphous silicon layer in advance, the difference of the crystallizations of the polysilicons in the drive area and the display area can exist after implementing an Excimer Laser Annealing process to the amorphous silicon layer, and in the drive area, the polysilicon with the larger lattice dimension is formed to promote the electron mobility; the fractured crystals can be achieved in the crystallization process of the display area to form the polysilicon with the smaller lattice dimension for ensuring the uniformity of the grain boundary and raising the uniformity of the current, and thus, the electrical property demands for the different TFTs can be satisfied to raise the light uniformity of the OLED.

Abstract: A manufacturing method of a thin film transistor is provided, which comprising the steps of: providing a substrate which includes a film layer; coating a photoresist material on the film layer to form a photoresist layer; executing an exposure process to the photoresist layer by using a mask, wherein the mask includes a central region and a boundary region surrounding the central region, a thickness of the central region is greater than that of the boundary region, and by having the thickness of the central region greater than that of the boundary region during the exposure process applied to the photoresist layer, loading effect happened during the development process is cancelled to uniformize a thickness of the film layer. A mask, a thin film transistor, and a display device are also provided in the present invention.

Abstract: The present disclosure provides an array substrate and a method of manufacturing the same. The array substrate includes a substrate, a buffer layer, an active layer, a gate insulating layer with a second via hole, a gate, an interlayer insulating layer with a first via hole, a source electrode contacting the active layer through the first and second via holes, a planarization layer with a third via hole, a common electrode with a fourth via hole and a passivation layer sequentially disposed on the substrate, and a pixel electrode disposed on the passivation layer contacts the active layer through a fifth via hole passing through the fourth and third via holes, the interlayer insulating layer, and the gate insulating layer. According to present disclosure, static electricity generated in manufacturing is effectively prevented from being transferred to the active layer to cause Electro-Static discharge, which further improves the product quality.

Abstract: The invention provides a TFT substrate manufacturing method and TFT substrate. The TFT substrate manufacturing method first etches the gate insulation layer to form two first through-holes and forming two bridging metal blocks inside the two first through holes; then etches the interlayer dielectric layer to form two second through-holes connecting respectively the two first through-holes, the source and drain connecting the two bridging metal blocks respectively through the two second through-holes. By changing a conventional etching process into two etching process to form the through-hole structure on the gate insulation layer and interlayer dielectric layer, able to improve uniformity of the active layer, reduce process difficulty, avoid the problem of etching stopped due to higher etching thickness, and improve the product quality.

Abstract: Disclosed is a display panel and a display device. The display panel includes an array substrate, a color filter substrate and a liquid crystal layer. A plurality of parallel gate lines is disposed on the array substrate. The liquid crystal layer is disposed between the array substrate and the color filter substrate. The liquid crystal layer has a thickness gradually decreasing along a direction from an output near-end to an output far-end of the gate line. Display uniformity of a panel can be improved by the display panel and the display device.

Abstract: The present disclosure a semiconductor layer structure having an insulating substrate and a semiconductor layer formed on the insulating substrate. The semiconductor layer includes a source signal access terminal, a drain signal access terminal, a first semiconductor layer pattern and a second semiconductor layer pattern; the first semiconductor layer pattern and the second semiconductor layer pattern formed between the source signal access terminal and the drain signal access terminal in parallel. The present disclosure also provides a method for fabricating a semiconductor layer structure.

Abstract: The invention provides a TFT substrate manufacturing method and TFT substrate. The TFT substrate manufacturing method first etches the gate insulation layer to form two first through-holes and forming two bridging metal blocks inside the two first through holes; then etches the interlayer dielectric layer to form two second through-holes connecting respectively the two first through-holes, the source and drain connecting the two bridging metal blocks respectively through the two second through-holes. By changing a conventional etching process into two etching process to form the through-hole structure on the gate insulation layer and interlayer dielectric layer, able to improve uniformity of the active layer, reduce process difficulty, avoid the problem of etching stopped due to higher etching thickness, and improve the product quality.

Abstract: The present invention provides a manufacture method of an array substrate, comprising steps of: depositing an active layer including amorphous silicon on a substrate; covering the active layer with a SiOx thin film; converting the amorphous silicon in the active layer into polysilicon; etching the active layer to form a pattern; implanting ion into the active layer; cleaning and removing the SiOx thin film. In the present invention, first, the SiOx thin film covers the active layer, and then processes of the conversion from amorphous silicon into polysilicon, etching the active layer and ion implantation are performed. After the ion is implanted into the active layer, the SiOx thin film is removed so that the active layer is always in the state covered by the thin film in the process to realize the technical result of reducing the pollution to the active layer.

Abstract: The present invention provides a manufacture method of a Low Temperature Poly-silicon TFT substrate and a Low Temperature Poly-silicon TFT substrate, in which by locating one heat sink layer under the amorphous silicon layer in advance, the difference of the crystallizations of the polysilicons in the drive area and the display area can exist after implementing an Excimer Laser Annealing process to the amorphous silicon layer, and in the drive area, the polysilicon with the larger lattice dimension is formed to promote the electron mobility; the fractured crystals can be achieved in the crystallization process of the display area to form the polysilicon with the smaller lattice dimension for ensuring the uniformity of the grain boundary and raising the uniformity of the current, and thus, the electrical property demands for the different TFTs can be satisfied to raise the light uniformity of the OLED.

Abstract: The present disclosure a semiconductor layer structure having an insulating substrate and a semiconductor layer formed on the insulating substrate. The semiconductor layer includes a source signal access terminal, a drain signal access terminal, a first semiconductor layer pattern and a second semiconductor layer pattern; the first semiconductor layer pattern and the second semiconductor layer pattern formed between the source signal access terminal and the drain signal access terminal in parallel. The present disclosure also provides a method for fabricating a semiconductor layer structure.

Abstract: A TFT array substrate structure includes a patterned metal light-shielding layer that includes a plurality of metal light-shielding blocks arranged in an array and a narrowed metal strip connected between two adjacent ones of the metal light-shielding blocks. The metal light-shielding layer and a common electrode are connected to and receive a common voltage signal. For each of TFT, the pixel electrode is connected to a drain electrode of the TFT; the pixel electrode has a portion overlapping the common electrode to form a first storage capacitor; and the metal light-shielding layer has a portion overlapping the drain electrode and the pixel electrode to form a second storage capacitor. The first storage capacitor and the second storage capacitor are connected in parallel to increase the capacity of the storage capacitor. The metal light-shielding layer is arranged in a light-shielded area and thus the modification thereof does not affect aperture ratio.

Abstract: The present invention provides a manufacture method and a structure of a TFT backplate applicable to an AMOLED. The method comprises: step 1, providing a substrate (10) and deposing a buffer layer (20); step 2, sequentially forming an active layer (30) and a gate isolation layer (40) on the buffer layer (20); step 3, patterning the gate isolation layer (40) to form a concave part (401); step 4, forming a gate (50) of the switch thin film transistor and a gate (60) of the drive thin film transistor on the gate isolation layer, and the gate (50) of the switch thin film transistor is in the concave part (401); step 5, deposing an interlayer insulation layer (70). The method simplifies the manufacture process of the TFT backplate and increases the subthreshold swing of the drive thin film transistor by manufacturing a single layer gate isolation layer with height difference to raise the gray scale switch and control performance of the AMOLED panel.