Abstract: A method for automatically distributing IP address, which is applied to a switch in communication with all clients having a MAC address and a network segment where all clients are located, comprises automatic issues or assignments of an IP address in response to ARP requests and detecting within a first waiting period which is of random length for each client whether an IP address assigned to a client conflicts with that of other clients. The assigned IP address of the client is unchanged when the IP address of the client does not conflict with other client but, subject to a MAC condition, is released for future non-use after a second random waiting time in case of IP address conflicts between clients. An IP address automatic distribution system and a client are also disclosed.

Abstract: An integrated bus architecture for transmitting trace information from a plurality of processors included on an integrated chip having one or more peripheral I/O channels comprises a segmented bus having a plurality of segments arranged in a ring topology and configured to transmit trace information in a circular pathway from upstream segments to downstream segments, and one or more trace output circuits each connected to a respective segment and each including a switch configured to be dynamically toggled between enabled and disabled states. The plurality of segments includes a respective segment for each processor having a coupling unit connected to a trace port of the processor. The coupling unit is configured to receive trace information from the trace port, to receive trace information from the adjacent upstream segment, and to transmit items of trace information to the adjacent downstream segment.

Abstract: An integrated bus architecture for transmitting trace information from a plurality of processors included on an integrated chip having one or more peripheral I/O channels comprises a segmented bus having a plurality of segments arranged in a ring topology and configured to transmit trace information in a circular pathway from upstream segments to downstream segments, and one or more trace output circuits each connected to a respective segment and each including a switch configured to be dynamically toggled between enabled and disabled states. The plurality of segments includes a respective segment for each processor having a coupling unit connected to a trace port of the processor. The coupling unit is configured to receive trace information from the trace port, to receive trace information from the adjacent upstream segment, and to transmit items of trace information to the adjacent downstream segment.