Abstract: A field effect transistor (FET) includes source/drain silicide regions located in a silicon layer; source/drain interfacial layers located in between the source/drain silicide regions and the silicon layer; and a fully silicided gate stack comprising a gate oxide layer located on the silicon layer, a gate interfacial layer located on the gate oxide layer, and a gate silicide located on the gate interfacial layer.

Abstract: A method for forming a field effect transistor (FET) includes forming a gate stack on a silicon layer, the gate stack comprising a gate polysilicon on top of a gate oxide layer; forming a fully silicided gate from the gate polysilicon and forming source/drain silicide regions in the silicon layer; implanting the gate silicide and the source/drain silicide with dopants; and performing rapid thermal annealing to form a gate interfacial layer in between the gate silicide and the gate oxide layer, and source/drain interfacial layers between the source/drain silicide regions and the silicon layer.