Patents by Inventor ZHANGPING CHEN

ZHANGPING CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240053390
    Abstract: The present invention discloses a multiband resonance frequency tracking circuit applied to ultrasonic machining, including an output current-voltage phase difference direction detection circuit and a multiband resonance frequency tracking circuit, where a detection signal output end of the output current-voltage phase difference direction detection circuit is connected to a signal input end of the multiband resonance frequency tracking circuit. Through the foregoing technical solutions, in the present invention, a system detuning state is quickly determined by using a current-voltage phase difference direction detection signal outputted by a D flip-flop in a chip SN74HC74D, and a dead-time resistor between a 5th pin and a 7th pin in a chip EG3525 can be changed in a timely manner based on a detuning degree of a piezoelectric transducer, so as to change a system driving frequency to track a resonance frequency of the piezoelectric transducer and implement fast and accurate tracking.
    Type: Application
    Filed: October 21, 2021
    Publication date: February 15, 2024
    Inventors: Yaguang KONG, Zhangping CHEN, Xichao TANG, Hongbo ZOU, Na HUANG, Fan ZHANG, Xiaodong ZHAO, Honghuan CHEN
  • Patent number: 11620398
    Abstract: Embodiments may be generally directed to techniques to encrypt and decrypt data in a first fuse block array using an encryption key of a second fuse block array, the second fuse block array having the encryption key comprising a plurality of segments of bits, an inverse encryption key comprising a second plurality of segments of bits, each segment of the inverse encryption key to correspond with a particular segment of the encryption key, and a random pattern having equally distributed bit values, the random pattern to enable detection of voltage attacks on the second fuse block array.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: April 4, 2023
    Assignee: INTEL CORPORATION
    Inventors: Neeraj S. Upasani, David P. Turley, Sergiu D. Ghetie, Zhangping Chen, Jason G. Sandri
  • Publication number: 20190278932
    Abstract: Embodiments may be generally directed to techniques to encrypt and decrypt data in a first fuse block array using an encryption key of a second fuse block array, the second fuse block array having the encryption key comprising a plurality of segments of bits, an inverse encryption key comprising a second plurality of segments of bits, each segment of the inverse encryption key to correspond with a particular segment of the encryption key, and a random pattern having equally distributed bit values, the random pattern to enable detection of voltage attacks on the second fuse block array.
    Type: Application
    Filed: May 29, 2019
    Publication date: September 12, 2019
    Applicant: INTEL CORPORATION
    Inventors: NEERAJ S. UPASANI, DAVID P. TURLEY, SERGIU D. GHETIE, ZHANGPING CHEN, JASON G. SANDRI
  • Patent number: 10318748
    Abstract: Embodiments may be generally directed to techniques to encrypt and decrypt data in a first fuse block array using an encryption key of a second fuse block array, the second fuse block array having the encryption key comprising a plurality of segments of bits, an inverse encryption key comprising a second plurality of segments of bits, each segment of the inverse encryption key to correspond with a particular segment of the encryption key, and a random pattern having equally distributed bit values, the random pattern to enable detection of voltage attacks on the second fuse block array.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: June 11, 2019
    Assignee: INTEL CORPORATION
    Inventors: Neeraj S. Upasani, David P. Turley, Sergiu D. Ghetie, Zhangping Chen, Jason G. Sandri
  • Publication number: 20180095897
    Abstract: Embodiments may be generally directed to techniques to encrypt and decrypt data in a first fuse block array using an encryption key of a second fuse block array, the second fuse block array having the encryption key comprising a plurality of segments of bits, an inverse encryption key comprising a second plurality of segments of bits, each segment of the inverse encryption key to correspond with a particular segment of the encryption key, and a random pattern having equally distributed bit values, the random pattern to enable detection of voltage attacks on the second fuse block array.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Applicant: INTEL CORPORATION
    Inventors: NEERAJ S. UPASANI, DAVID P. TURLEY, SERGIU D. GHETIE, ZHANGPING CHEN, JASON G. SANDRI