Abstract: A shift register unit is disclosed, including a first input module transmitting a first level voltage signal to a first node under control of a voltage signal of a second node; a reset module transmitting a second level voltage signal to the first node under control of an output signal of the present stage of shift register unit; a first output module outputting the second level voltage signal to the output terminal of the shift register unit under control of a voltage signal of the first node; a second input module receiving an input signal and transmitting the input signal to the second node under control of a clock signal; a storage capacitor maintaining the voltage of the second node while the second input module is turned off; and a second output module outputting the first level voltage signal to the output terminal.

Abstract: A shift register unit, a gate drive circuit, a display panel and a display device are disclosed. The shift register unit combines a light emission signal output module with a scanning signal output module, i.e. integrating a light emission shift register unit and a scanning shift register unit into a circuit, thereby reducing the number of clock signals as required. The light emission signal output module and the scanning signal output module may be synchronously driven. The light emission signal output module continuously outputs a first reference signal or a second reference signal by controlling potentials of a first and fifth node. The scanning signal output module continuously outputs the second reference signal or a second clock signal by controlling potentials of a third and fourth node, thereby generating a light emission signal having multiple pulse widths, i.e. effecting duty ratio control to the light emission signal.

Abstract: The present application provides a shift register unit as well as a gate drive circuit and a display device using it. The shift register unit comprises an input module, an NAND gate module, an inverter module, a pull-up module and a pull-down module. The input module receives an input signal and a first clock signal, and transfers the input signal to a first input end of the NAND gate module and the pull-down module under the control of the first clock signal. A second input end of the NAND gate module receives a second clock signal input, and an output end thereof connects the inverter module. An output end of the inverter module connects the pull-up module. The pull-up module pulls up the output signal to a high level based on the output of the inverter module. The pull-down module pulls down the output signal to a low level under the control of the received input signal and the second clock signal.

Abstract: The present disclosure provides a reading circuit, a driving method of the reading circuit and a photoelectric detector including the reading circuit. The reading circuit includes a reset sub-circuit, a readout sub-circuit, a driving sub-circuit and an integration sub-circuit. The reset sub-circuit is configured to reset voltages at the first node and the second node under the control of a reset signal inputted from the first signal terminal. The integration sub-circuit is configured to cause the first node and the second node to communicate with each other so as to change the voltages at the first node and the second node. The readout sub-circuit is configured to read out a current value in a case where the voltage at the first node controls the driving sub-circuit to be turned on, and output the current value through the fifth signal terminal.

Abstract: The disclosure provides a pixel circuit including a reset module, a data write module, a storage module, a compensation and hold module, a drive module, and a light emitting device. The reset module is connected to the storage module and the light emitting device. The data write module is connected to the drive module. The compensation and hold module is connected to the drive module and the storage module. The storage module is connected to the drive module. The drive module is connected to the light emitting device.

Abstract: The present disclosure provides a shift register unit and a shift register, a gate driver circuit and a display apparatus where the shift register unit can be applied. A signal amplification module including two transistors each having a small channel width is added at an output node of the shift register unit. In this way, the output capability can be improved significantly with the same design parameters in case of a high load.

Abstract: The present application discloses a shift register, a gate drive circuit and a display panel. In the shift register, the first node control sub-circuit provides a signal of the input signal terminal to the first node, and provides a signal of the first reference signal terminal to the first node; the second node control sub-circuit provides a signal of the second reference signal terminal to the second node, and provides a signal of the third clock signal terminal to the second node; the first output sub-circuit provides a signal of the second clock signal terminal to the output terminal for stabilizing a voltage difference between the first node and the output terminal when the first node is in a floating state; and the second output sub-circuit provides the signal of the first reference signal terminal to the output terminal.

Abstract: A shift register unit includes a first shift register module and a second shift register module. The first shift register module includes a first input module configured to input a start signal to a first control node, a second input module configured to input a first level to a second control node, a first output control module configured to input a second level to the first control node, a second output control module configured to input a first clock signal to the second control node, a first output module configured to input the first clock signal to a first output end, and a second output module configured to input the first level to the first output end. The second shift register module includes a second output end, third and fourth input modules, third and fourth output control modules, and third and fourth output modules.

Abstract: Disclosed are a pixel Circuit, a driving method thereof, and a display apparatus. The pixel circuit comprises a driving transistor, a capacitor connected between the source and the gate of the driving transistor, a light-emitting element, a light-emitting control module, a data writing module and a compensating module. By cooperation among the various modules, the drift of the threshold voltage of the driving transistor can be compensated. Accordingly, the driving current which is provided by the driving transistor to drive the light-emitting element to emit light only relates to the voltage of the data signal and the reference signal, while does not relate to the threshold voltage of the driving transistor and the first reference voltage source, and thus the effect on the current flowing through the light-emitting element raised due to the threshold voltage and due to the IR drop can be avoided.

Abstract: An embodiment of the present invention discloses a gate drive circuit comprising several stages of unit circuits, wherein each unit circuit comprises: a high level terminal, a low level terminal, a first clock terminal, a second clock terminal, a gate output terminal, a logic turn-on input terminal, a logic turn-on output terminal, a control module, a first gating module and a second gating module. An embodiment of the present invention also provides a display device comprising the gate drive circuit. A gate drive circuit with interlaced output is realized, ensuring no suspended state in time sequence between interlaced lines, while maintaining an original dual time sequence (i.e., eliminating suspended state between interlaced lines, and ensuring a stable output of the shifting register).

Abstract: The present disclosure provides a shift register, including: an input circuit, electrically connected to a triggering signal line that provides a triggering signal, a first clock signal line that provides a first clock signal, and a first node; configured for controlling whether the triggering signal is outputted to the first node based on the first clock signal; a control circuit, electrically connected to the first node, a second node, the first clock signal line, a second clock signal line that provides a second clock signal, and a turn-on signal line that provides a turn-on signal, configured for controlling whether the turn-on signal is outputted to the second node; and an output circuit, electrically connected to the first node, the second node, a first signal line that provides a first signal, a second signal line that provides a second signal, and a driving signal output line that outputs a driving signal.

Abstract: There are provided a shift register, an array substrate and a display apparatus. The shift register comprises: a triggering module, output module, input terminal, first output terminal and a second output terminal, wherein: the trigger module is configured to, according to an input signal from the input terminal, output a triggering signal that has a phase the same as the input signal and delays half a clock cycle more than the input signal under the action of a clock signal; the output module is configured to output an output signal that has a phase opposite to the input signal and delays half a clock cycle more than the input signal to the first output terminal under the triggering of the triggering signal and under the action of the clock signal; and an operating voltage of a signal outputted from the first output terminal is supplied by a direct current power supply.

Abstract: The embodiments of the present invention provide a pixel compensation circuit, a display device and a driving method. The data signal loading module in the pixel compensation circuit loads the data signal to the gate of the driving transistor when the scanning signal is a turn-on signal. The voltage loading module loads the first voltage signal to the source of the driving transistor when the first luminescent signal and the scanning signal are both turn-on signals. The driving signal generation module is used for storing the signal of the source of the driving transistor, the signal of the gate of the driving transistor, the third voltage signal and the voltage signal inputted by the voltage loading module at that time; and is capable of generating a driving signal for driving the organic light-emitting diode to emit light.

Abstract: A shift register unit and a method for driving the shift register unit, a gate drive circuit and a display device are provided. The shift register unit includes an inputting unit, an outputting unit, a reset unit, a first control unit and a second control unit, a first node, a second node, a third node, a shift signal outputting terminal and multiple inputting terminals. A width of a shift pulse output by the shift register unit may be adjusted by adjusting a width of a shift pulse input to the shift register unit, and the output shift pulse and the input shift pulse have an identical width.

Abstract: Embodiments of the disclosure provide a display substrate and a driving method thereof, as well as a display device. The display substrate comprises a plurality of select switch arrays and a plurality of selecting control circuits formed on the base substrate. Each select switch array comprises a plurality of select switches, a first terminal of each select switch being connected to a corresponding data line, a second end of each select switch being connected to a same data voltage input terminal, a control terminal of each select switch being connected to a same selecting control circuit. Each data line is connected with two columns of pixels, and the gate lines connected with the two columns of pixels are different. Each selecting control circuit is connected to a plurality of selecting control signal input terminals and a corresponding select switch array.

Abstract: Embodiments of the present disclosure provide a drive circuit and a drive method thereof, a display substrate and a drive method thereof, and a display device. The drive circuit comprises a conversion unit provided with a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, and an output terminal, wherein the fourth input terminal is connected to a direct current power source, and wherein the output terminal is connected to a pixel circuit. The first input terminal is configured to input a voltage signal, the second input terminal is configured to input a first drive signal, the third input terminal is configured to input a second drive signal, and the output terminal is configured to output a current signal. The conversion unit converts the voltage signal output from the source drive unit into the current signal and the pixel circuit is driven by the current signal.

Abstract: A shift register unit and a control method thereof, a gate driving circuit, and a display device. The shift register unit includes a signal input module, connected to a signal input terminal, a first clock signal terminal and a control node; a pull-down module, connected to the control node, a first voltage terminal and a signal output terminal; a first pull-up control module, connected to the control node, the pull-up module and a second voltage terminal; a second pull-up control module, connected to the control node, the pull-up module, the first clock signal terminal, the first voltage terminal and a second clock signal terminal; and a pull-up module, connected to the signal output terminal and the second voltage terminal. The problem that it is difficult to realize a narrow display frame by the bonding process due to size increase of the driving circuit can be solved.

Abstract: A shift register includes a pulling-up unit, a pulling-down unit and an output unit, the pulling-up unit being connected to a first input terminal, a first clock signal terminal, a first level terminal, a pulling-down node and a pulling-up node, respectively, the pulling-down unit being connected to a second input terminal, a second level terminal, the first level terminal, the pulling-up node and the pulling-down node, respectively, and the output unit being connected to the first level terminal, a second clock signal terminal, an output terminal, the pulling-down node and the pulling-up node, respectively. The shift register provides an output signal through the output terminal according to the signals inputted from the first input terminal, the second input terminal, the first level terminal, the second level terminal, the first clock signal terminal and the second clock signal terminal.

Abstract: The present disclosure relates to display technology, and more particularly, to a shift register, a method for driving the shift register, a gate driving circuit and a display apparatus. The shift register comprises a pull-up module, a pull-down module and a holding module. The pull-up module is connected to the holding module and the pull-down module, an electrical connection point of the pull-up module and the pull-down module constituting an output signal terminal, and configured to pull up a signal outputted at the output signal terminal in response to a first clock signal. The pull-down module is connected to the holding module and configured to pull down the signal outputted at the output signal terminal in response to a second clock signal. The holding module is configured to hold a signal outputted from the pull-up module and the pull-down module at a fixed level.

Abstract: Provided are a shift register unit and a driving method thereof, a scan driving circuit, a display device, wherein the shift register unit comprises an input module configured to output a voltage at the signal input terminal to the first node, an energy storage module configured to store the voltage at the first node or to charge the first node, a first pull-up control module configured to output a voltage at the first voltage terminal to the pull-up control node, a second pull-up control module configured to output a voltage at the second voltage terminal to the pull-up control node, a pull-down control module configured to output a voltage at the first node to the pull-down control node. The pulse width of the signal of each stage of output terminal of the GOA circuit can be adjusted.