Abstract: A device for measuring a microwave surface resistance of a dielectric conductor deposition interface includes: a test platform, a calibration component, a sealing cavity and a support plate; wherein the test platform comprises: a shielding cavity having an open bottom, a dielectric rod, an input coupling structure, an output coupling structure, and a dielectric supporter; the dielectric conductor test sample and the test platform form a TE0m(n+?) mode dielectric resonator; the calibration component and the dielectric conductor test sample are mounted on the test platform to measure corresponding quality factors, thereby calculating the microwave surface resistance of the deposition interface of the dielectric conductor test sample. The present invention requires no pre-measurement of relative permittivity and loss tangent of the dielectric conductor test sample.

Abstract: A room-temperature semiconductor maser, including a first matching network, a second matching network, a heterojunction-containing transistor, and a resonant network. The output end of the first matching network is connected to the drain of the heterojunction-containing transistor. The input end of the second matching network is connected to the source of the heterojunction-containing transistor. The gate of the heterojunction-containing transistor is connected to the resonant network. The pumped microwaves are fed into the input end of the first matching network.

Abstract: A device for measuring a microwave surface resistance of a dielectric conductor deposition interface includes: a test platform, a calibration component, a sealing cavity and a support plate; wherein the test platform comprises: a shielding cavity having an open bottom, a dielectric rod, an input coupling structure, an output coupling structure, and a dielectric supporter; the dielectric conductor test sample and the test platform form a TE0m(n+?) mode dielectric resonator; the calibration component and the dielectric conductor test sample are mounted on the test platform to measure corresponding quality factors, thereby calculating the microwave surface resistance of the deposition interface of the dielectric conductor test sample. The present invention requires no pre-measurement of relative permittivity and loss tangent of the dielectric conductor test sample.

Abstract: A room-temperature semiconductor maser, including a first matching network, a second matching network, a heterojunction-containing transistor, and a resonant network. The output end of the first matching network is connected to the drain of the heterojunction-containing transistor. The input end of the second matching network is connected to the source of the heterojunction-containing transistor. The gate of the heterojunction-containing transistor is connected to the resonant network. The pumped microwaves are fed into the input end of the first matching network.