Patents by Inventor Zhaobin Qi

Zhaobin Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of assembling same
    Patent number: 8969135
    Abstract: A semiconductor device includes a lead frame having a down bond area, a die attach area and a dam formed between the down bond area and the die attach area. A bottom of the dam is attached on a surface of the lead frame. The dam prevents contamination of the down bond area from die attach material, which may occur during a die attach process.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: March 3, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Peng Liu, Qingchun He, Zhaobin Qi, Liqiang Xu, Tong Zhao
  • SEMICONDUCTOR DEVICE AND METHOD OF ASSEMBLING SAME
    Publication number: 20140246767
    Abstract: A semiconductor device includes a lead frame having a down bond area, a die attach area and a dam formed between the down bond area and the die attach area. A bottom of the dam is attached on a surface of the lead frame. The dam prevents contamination of the down bond area from die attach material, which may occur during a die attach process.
    Type: Application
    Filed: November 11, 2013
    Publication date: September 4, 2014
    Inventors: Peng Liu, Qingchun He, Zhaobin Qi, Liqiang Xu, Tong Zhao
  • METHOD OF PACKAGING SEMICONDUCTOR DEVICE
    Publication number: 20110165729
    Abstract: Quad Flat No-Lead packaged devices are manufactured using two singulation operations with two different saw blades of varying widths with the first singulation operation using a wider saw blade than the second singulation operation. Between singulation operations, the exposed portions of the leads are plated with a solderable metal. By performing the second singulation operation within the first cut made by the first singulation, at least half of the exposed metal of the leads remains plated. Thus, better solder joints may be formed, which allows for simpler visual inspection.
    Type: Application
    Filed: July 5, 2010
    Publication date: July 7, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Peng LIU, Xu Gao, Qingchun He, Zhaobin Qi, Dehong Ye