Patents by Inventor ZHAOBING LI

ZHAOBING LI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200135274
    Abstract: A structure of nonvolatile memory device includes a substrate, having a logic device region and a memory cell region. A first gate structure for a low-voltage transistor is disposed over the substrate in the logic device region, wherein the first gate structure comprises a single-layer polysilicon. A second gate structure for a memory cell is disposed over the substrate in the memory cell region. The second gate structure includes a gate insulating layer on the substrate. A floating gate layer is disposed on the gate insulating layer, wherein the floating gate layer comprises a first polysilicon layer and a second polysilicon layer as a stacked structure. A memory dielectric layer is disposed on the floating gate layer. A control gate layer is disposed on the memory dielectric layer, wherein the control gate layer and the single-layer polysilicon are originated from a preliminary polysilicon layer in same.
    Type: Application
    Filed: October 29, 2018
    Publication date: April 30, 2020
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: LIANG YI, ZHAOBING LI, CHI REN
  • Publication number: 20140377945
    Abstract: A floating gate forming process includes the following steps. A substrate containing active areas isolated from each other by isolation structures protruding from the substrate is provided. A first conductive material is formed to conformally cover the active areas and the isolation structure. An etch back process is performed on the first conductive material to respectively form floating gates separated from each other in the active areas.
    Type: Application
    Filed: June 21, 2013
    Publication date: December 25, 2014
    Inventors: Cheng-Yuan Hsu, ZHAOBING LI, CHI REN, Ching-Long Tsai, Wei Cheng
  • Publication number: 20140183614
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, at least a first gate, a shallow trench isolation (STI) and a third gate. The first gate is disposed on the semiconductor substrate, and the first gate partially overlaps the third gate and the shallow trench isolation. Furthermore, the third gate is disposed in a shallow trench isolation, and the third gate includes at least a protrusion.
    Type: Application
    Filed: January 3, 2013
    Publication date: July 3, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: ZHAOBING LI, Cheng-Yuan Hsu, CHI REN