Patents by Inventor Zhaocai Lin

Zhaocai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Mixed-signal integrated circuit
    Patent number: 10386415
    Abstract: A mixed-signal integrated circuit includes an analog circuit comprising at least one digital block embedded in the analog circuit, the at least one digital block comprising a plurality of functional bits and a plurality of configuration bits, the plurality of functional bits providing for a functionality of the analog circuit according to a designed functionality and the plurality of configuration bits being usable for configuring a plurality of operational modes of the analog circuit; and a digital circuit comprising a scan chain configured to scan at least part of the functional bits of the digital block embedded in the analog circuit with respect to the designed functionality, wherein the scan chain is further configured to set at least part of the configuration bits of the digital block embedded in the analog circuit according to a selected operational mode of the plurality of operational modes of the analog circuit.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: August 20, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Udi Nir, Zhaocai Lin, Tingting Li
  • Mixed-Signal Integrated Circuit
    Publication number: 20180003770
    Abstract: A mixed-signal integrated circuit includes an analog circuit comprising at least one digital block embedded in the analog circuit, the at least one digital block comprising a plurality of functional bits and a plurality of configuration bits, the plurality of functional bits providing for a functionality of the analog circuit according to a designed functionality and the plurality of configuration bits being usable for configuring a plurality of operational modes of the analog circuit; and a digital circuit comprising a scan chain configured to scan at least part of the functional bits of the digital block embedded in the analog circuit with respect to the designed functionality, wherein the scan chain is further configured to set at least part of the configuration bits of the digital block embedded in the analog circuit according to a selected operational mode of the plurality of operational modes of the analog circuit.
    Type: Application
    Filed: September 15, 2017
    Publication date: January 4, 2018
    Inventors: Udi Nir, Zhaocai Lin, Tingting Li