Patents by Inventor Zhaohao Wang
Zhaohao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12029135Abstract: The present disclosure provides a magnetic random-access memory cell, a memory and a device. The magnetic random-access memory cell comprises: a spin-orbit coupling layer and a first magnetic tunnel junction and a second magnetic tunnel junction disposed on the spin-orbit coupling layer, the first magnetic tunnel junction and the second magnetic tunnel junction having at least two symmetrical axes with different lengths; an angle between an easy magnetization symmetrical axis direction of a free layer of the first magnetic tunnel junction and a length direction of the spin-orbit coupling layer is a preset first angle, and an angle between an easy magnetization symmetrical axis direction of a free layer of the second magnetic tunnel junction and the length direction of the spin-orbit coupling layer is a preset second angle; neither of the first angle and the second angle is zero degree, 90 degrees or 180 degrees.Type: GrantFiled: December 18, 2021Date of Patent: July 2, 2024Assignee: BEIHANG UNIVERSITYInventors: Weisheng Zhao, Zhaohao Wang, Kaihua Cao, Gefei Wang
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Patent number: 11832530Abstract: The present disclosure provides a multi-bit memory cell, an analog-to-digital converter, a device and a method. The multi-bit memory cell comprises: a spin-orbit coupling layer and a plurality of magnetic tunnel junctions disposed on the spin-orbit coupling layer, the plurality of magnetic tunnel junctions comprising a plurality of first magnetic tunnel junctions; the plurality of first magnetic tunnel junctions are sequentially arranged along a length direction of the spin-orbit coupling layer, and critical currents of reversals of the magnetizations of free layers of the plurality of first magnetic tunnel junctions are progressively increased or decreased in sequence along the length direction. The present disclosure provides a multi-bit memory unit with simple manufacturing process and structure.Type: GrantFiled: October 22, 2021Date of Patent: November 28, 2023Assignee: BEIHANG UNIVERSITYInventors: Weisheng Zhao, Zhaohao Wang, Kaihua Cao, Gefei Wang, Min Wang
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Publication number: 20230335304Abstract: The invention belongs to the technical field of nuclear reactor materials design, and discloses a method for improving the withstanding capability of the cladding material in the fast neutron irradiation environment, comprising the following steps: selecting the cladding material with the annular structure and placing it on the outer side of the metallic fuel slug, with leaving a 0.2-0.8 mm gap between the metallic fuel slug and the cladding material; processing the operation in a reactor subsequently, with an annealing process of the fast neutron reactor fuel during the operation of the reactor; improves the withstanding capability of the cladding material in the fast neutron irradiation environment.Type: ApplicationFiled: June 27, 2022Publication date: October 19, 2023Inventors: Di Yun, Zhaohao Wang, Chunyang Wen, Tiantian Shi, Linna Feng, Wenbo Liu, Jianqiang Shan
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Publication number: 20220344064Abstract: The disclosure discloses a high-burnup fast reactor metal fuel, wherein the reactor core is loaded with metal fuel made of natural uranium alloy U-50Zr. The metal fuel manually controls the temperature to realize phase transition, increase burnup, and extend the service life of fuel; increases the fuel burnup to increase uranium utilization and reduce the pressure of disposing nuclear waste; extends the fuel life cycle to reduce nuclear power costs and improve the economy of nuclear energy; effectively carries out the timely release of fission gas and the periodic elimination of fuel defects, thus reducing the fuel-cladding mechanical interaction caused by swelling, and increasing the safety.Type: ApplicationFiled: June 1, 2021Publication date: October 27, 2022Inventors: Di Yun, Chunyang Wen, Linna Feng, Zhaohao Wang, Wenbo Liu, Jianqiang Shan
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Publication number: 20220285610Abstract: The present disclosure provides a multi-bit memory cell, an analog-to-digital converter, a device and a method. The multi-bit memory cell comprises: a spin-orbit coupling layer and a plurality of magnetic tunnel junctions disposed on the spin-orbit coupling layer, the plurality of magnetic tunnel junctions comprising a plurality of first magnetic tunnel junctions; the plurality of first magnetic tunnel junctions are sequentially arranged along a length direction of the spin-orbit coupling layer, and critical currents of reversals of the magnetizations of free layers of the plurality of first magnetic tunnel junctions are progressively increased or decreased in sequence along the length direction. The present disclosure provides a multi-bit memory unit with simple manufacturing process and structure.Type: ApplicationFiled: October 22, 2021Publication date: September 8, 2022Inventors: Weisheng ZHAO, Zhaohao WANG, Kaihua CAO, Gefei WANG, Min WANG
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Publication number: 20220254993Abstract: The present disclosure provides a magnetic random-access memory cell, a memory and a device. The magnetic random-access memory cell comprises: a spin-orbit coupling layer and a first magnetic tunnel junction and a second magnetic tunnel junction disposed on the spin-orbit coupling layer, the first magnetic tunnel junction and the second magnetic tunnel junction having at least two symmetrical axes with different lengths; an angle between an easy magnetization symmetrical axis direction of a free layer of the first magnetic tunnel junction and a length direction of the spin-orbit coupling layer is a preset first angle, and an angle between an easy magnetization symmetrical axis direction of a free layer of the second magnetic tunnel junction and the length direction of the spin-orbit coupling layer is a preset second angle; neither of the first angle and the second angle is zero degree, 90 degrees or 180 degrees.Type: ApplicationFiled: December 18, 2021Publication date: August 11, 2022Inventors: Weisheng ZHAO, Zhaohao WANG, Kaihua CAO, Gefei WANG
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Patent number: 10910029Abstract: A complementary magnetic memory cell includes: a heavy metal film or an antiferromagnetic film, a first magnetic tunnel junction, a second magnetic tunnel junction, a first electrode, a second electrode, a third electrode, a fourth electrode, and a fifth electrode; wherein the first magnetic tunnel junction and the second magnetic tunnel junction are fabricated above the heavy metal film or the antiferromagnetic film; the first electrode, the second electrode and the third electrode are fabricated under the heavy metal film or the antiferromagnetic film; the fourth electrode is fabricated above the first magnetic tunnel junction, and the fifth electrode is fabricated above the second magnetic tunnel junction; to store one bit of data, the first magnetic tunnel junction and the second magnetic tunnel junction are arranged in a pair of complementary resistance states, wherein one magnetic tunnel junction is set to a high resistance state and the other remains unchanged.Type: GrantFiled: October 16, 2018Date of Patent: February 2, 2021Assignee: BEIHANG UNIVERSITYInventors: Weisheng Zhao, Zhaohao Wang, Erya Deng
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Patent number: 10388344Abstract: A magnetic memory includes one or more magnetic tunnel junctions, a heavy metal or anti-ferromagnetic strip film, a first bottom electrode and a second bottom electrode. Every magnetic tunnel junction is located on the strip film and represents a memory cell; the first bottom electrode and the second bottom electrode are respectively connected with two ends of the heavy metal or anti-ferromagnetic strip film; every magnetic tunnel junction includes a first ferromagnetic metal, a first oxide, a second ferromagnetic metal, a first synthetic antiferromagnetic layer and an Xth top electrode from bottom to top in sequence, wherein X is a serial number of the memory cell. A data writing method combines spin orbit torque with spin transfer torque to write data, and respectively applies two currents to the magnetic tunnel junction and the heavy metal or anti-ferromagnetic strip film. Only one current is unable to complete data writing.Type: GrantFiled: May 25, 2018Date of Patent: August 20, 2019Assignee: BEIHANG UNIVERSITYInventors: Weisheng Zhao, Zhaohao Wang, Mengxing Wang, Wenlong Cai
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Publication number: 20190051339Abstract: A complementary magnetic memory cell includes: a heavy metal film or an antiferromagnetic film, a first magnetic tunnel junction, a second magnetic tunnel junction, a first electrode, a second electrode, a third electrode, a fourth electrode, and a fifth electrode; wherein the first magnetic tunnel junction and the second magnetic tunnel junction are fabricated above the heavy metal film or the antiferromagnetic film; the first electrode, the second electrode and the third electrode are fabricated under the heavy metal film or the antiferromagnetic film; the fourth electrode is fabricated above the first magnetic tunnel junction, and the fifth electrode is fabricated above the second magnetic tunnel junction; to store one bit of data, the first magnetic tunnel junction and the second magnetic tunnel junction are arranged in a pair of complementary resistance states, wherein one magnetic tunnel junction is set to a high resistance state and the other remains unchanged.Type: ApplicationFiled: October 16, 2018Publication date: February 14, 2019Inventors: Weisheng Zhao, Zhaohao Wang, Erya Deng
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Publication number: 20180277184Abstract: A magnetic memory includes one or more magnetic tunnel junctions, a heavy metal or anti-ferromagnetic strip film, a first bottom electrode and a second bottom electrode. Every magnetic tunnel junction is located on the strip film and represents a memory cell; the first bottom electrode and the second bottom electrode are respectively connected with two ends of the heavy metal or anti-ferromagnetic strip film; every magnetic tunnel junction includes a first ferromagnetic metal, a first oxide, a second ferromagnetic metal, a first synthetic antiferromagnetic layer and an Xth top electrode from bottom to top in sequence, wherein X is a serial number of the memory cell. A data writing method combines spin orbit torque with spin transfer torque to write data, and respectively applies two currents to the magnetic tunnel junction and the heavy metal or anti-ferromagnetic strip film. Only one current is unable to complete data writing.Type: ApplicationFiled: May 25, 2018Publication date: September 27, 2018Inventors: Weisheng Zhao, Zhaohao Wang, Mengxing Wang, Wenlong Cai
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Patent number: 10020044Abstract: A high-density magnetic memory device includes: a heavy metal strip or an antiferromagnet strip with a thickness of 0-20 nm, and a plurality of magnetic tunnel junctions manufactured thereon, wherein each of the magnetic tunnel junctions represents a memory bit, which from bottom to top comprises a first ferromagnetic metal with a thickness of 0-3 nm, an oxide with a thickness of 0-2 nm, a second ferromagnetic metal with a thickness of 0-3 nm, a synthetic antiferromagnetic layer with a thickness of 10-20 nm and a No. X top electrode with a thickness of 10-200 nm, wherein an X value is a serial number of the memory bit; two ends of the heavy metal strip or the antiferromagnet strip are respectively plated with a first bottom electrode and a second bottom electrode. The write operation for the memory device of the present invention is accomplished by applying unidirectional write currents.Type: GrantFiled: October 26, 2017Date of Patent: July 10, 2018Assignee: BEIHANG UNIVERSITYInventors: Weisheng Zhao, Zhaohao Wang, Mengxing Wang, Lei Zhang
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Publication number: 20180061482Abstract: A high-density magnetic memory device includes: a heavy metal strip or an antiferromagnet strip with a thickness of 0-20 nm, and a plurality of magnetic tunnel junctions manufactured thereon, wherein each of the magnetic tunnel junctions represents a memory bit, which from bottom to top comprises a first ferromagnetic metal with a thickness of 0-3 nm, an oxide with a thickness of 0-2 nm, a second ferromagnetic metal with a thickness of 0-3 nm, a synthetic antiferromagnetic layer with a thickness of 10-20 nm and a No. X top electrode with a thickness of 10-200 nm, wherein an X value is a serial number of the memory bit; two ends of the heavy metal strip or the antiferromagnet strip are respectively plated with a first bottom electrode and a second bottom electrode. The write operation for the memory device of the present invention is accomplished by applying unidirectional write currents.Type: ApplicationFiled: October 26, 2017Publication date: March 1, 2018Inventors: Weisheng Zhao, Zhaohao Wang, Mengxing Wang, Lei Zhang