Abstract: The present disclosure provides a display substrate, including: a wiring mounting region. The wiring mounting region includes first wires and second wires, each of the first wires intersecting with one or more of the second wires, thereby defining one or more intersectional regions; and a semiconductor pattern between the first wire and the one or more second wires, the semiconductor pattern having at least one cross-sectional width covering at least a portion of at least one of the intersectional regions.

Abstract: Methods of protecting semiconductor devices may involve forming trenches in streets between stacks of semiconductor dice on regions of a semiconductor wafer. A protective material may be positioned between the die stacks and in the trenches, after which the wafer is thinned from a side opposite the die stacks to expose the protective material in the trenches. Semiconductor devices comprising stacks of dice and corresponding base semiconductor dice comprising wafer regions are separated from one another by cutting through the protective material along the streets and in the trenches. The protective material covers at least sides of each die stack as well as side surfaces of the corresponding base semiconductor die.

Abstract: Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in streets and at least surrounding stacks of semiconductor dice located on a wafer. Wafer-level methods of preparing semiconductor devices may involve attaching a wafer to a carrier substrate and forming stacks of laterally spaced semiconductor dice on die locations of the wafer. Molding material may be disposed over the die stacks on a surface of the wafer to at least surround the stacks of semiconductor dice with the molding material. Grooves may be formed in the molding material by partially cutting through the molding material between at least some of the stacks of semiconductor dice along streets between the die stacks. The resulting wafer-level assembly may then, when exposed to elevated temperatures during, for example, debonding the wafer from a carrier, exhibit reduced propensity for warping.

Abstract: A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.

Abstract: The disclosed computer-implemented method for forwarding network traffic using minimal Forwarding Information Bases (FIBS) may include (1) identifying a Routing Information Base (RIB) that includes a set of routes that define paths to destinations both inside and outside a network and then (2) creating a FIB that includes a subset of active routes whose size is below a size threshold by (A) importing, from the set of routes within the RIB, (I) internal routes that define paths to destinations inside the network, (II) high-traffic external routes that define paths to destinations outside the network, and (III) a default route that defines a path to a default node that facilitates resolution of traffic that does not match any of the internal or high-traffic external routes and (B) excluding, from the FIB, low-traffic external routes that define paths to destinations outside the network. Various other methods, systems, and apparatuses are also disclosed.

Abstract: A signal processing system for producing a load voltage at a load output of the signal processing system, wherein the load output comprises a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, and may include a first processing path configured to process a first signal derived from an input signal to generate the first load voltage at a first processing path output, a second processing path configured to process a second signal received at a second processing path input and derived from the input signal, wherein the second signal comprises information of the input signal absent from the first signal, to generate the second load voltage at a second processing path output, and a high-pass filter coupled between the first processing path output and the second processing path input.

Abstract: A method may include controlling switches of a switching full-bridge of a signal processing system to commutate polarity of a capacitor with respect to the first processing path output and a second processing path output of the signal processing system in response to a condition for commutating connectivity of the switching full-bridge and inserting a feedforward compensation that bypasses a loop filter of the second processing path in order to prevent discontinuities caused by commutating polarity of the capacitor from being compensated by the loop filter.

Abstract: A method of manufacturing an array substrate includes: forming a first functional layer comprising a plurality of array substrate areas and connection areas between adjacent array substrate areas; forming a plurality of conductive portions within each of the array substrate areas, the plurality of conductive portions extending from a corresponding one of the array substrate areas to a corresponding one of the connection areas and terminals of the plurality of conductive portions being in connection with capacitor lines within the corresponding one of the connection areas such that two capacitor lines between two adjacent array substrate areas face each other and are formed into a first capacitor element; forming a plurality of second functional layers on the first functional layer formed with the plurality of conductive portions and the capacitor lines, for forming a plurality of array substrates; and performing a cutting process at the connection areas between adjacent array substrates and removing the capac

Abstract: Provided herein are compositions and systems for use in polymerase-dependent, nucleotide transient-binding methods. The methods are useful for deducing the sequence of a template nucleic acid molecule and single nucleotide polymorphism (SNP) analyses. The methods rely on the fact that the polymerase transient-binding time for a complementary nucleotide is longer compared to that of a non-complementary nucleotide. The labeled nucleotides transiently-binds the polymerase in a template-dependent manner, but does not incorporate. The methods are conducted under any reaction condition that permits transient binding of a complementary or non-complementary nucleotide to a polymerase, and inhibits nucleotide incorporation.

Abstract: A light field imaging system with transparent photodetectors is presented. The light field imaging system includes: a stack of two or more detector planes, an imaging optic, and an image processor. The detector planes include one or more transparent photodetectors, such that transparent photodetectors have transparency greater than fifty percent (at one or more wavelengths) while simultaneously exhibiting responsivity greater than one amp per watt. The imaging optic is configured to receive light rays from a scene and refract the light rays towards the stack of two or more detector planes, such that the refracted light rays pass through the transparent detector planes and the refracted light rays are focused within the stack of detector planes. The image processor reconstruct a light field for the scene (at one of more wavelengths) using the light intensity distribution measured by each of the photodetectors.

Abstract: Hybrid electrochemical capacitors, electronic devices using such capacitors, and associated methods are disclosed. In an example, a hybrid electrochemical capacitor can include a first electrode made from Mg, Na, Zn, Al, Sn, or Li, a second electrode made from a porous material such as porous carbon or passivated porous silicon, and an electrolyte. The hybrid electrochemical capacitors can have enhanced voltage and energy density compared to other electrochemical capacitors, and enhanced power density compared to batteries.

Abstract: Provided herein is an apparatus including a substrate and a magnetic recording layer over the substrate. In addition, a thermochromic layer is over the substrate, wherein the thermochromic layer includes a first optical absorbance at a first temperature and a second optical absorbance at a second temperature.

Abstract: Disclosed are biodegradable insulation materials comprising a structural scaffold; and at least one temperature resilient fungus. Also disclosed are methods of making and using biodegradable insulation materials comprising a structural scaffold; and at least one temperature resilient fungus. For example, disclosed are methods of insulating an infrastructure comprising administering the disclosed biodegradable insulation materials to an infrastructure.

Abstract: The present invention provides a Fabry-Perot sensor for measuring inclination. Wherein the present inclinometer is fixed on a static detected object in application use, the mass block is flexibly connected to the top plate, thus the line between the center of gravity of the mass block and the connecting point on the top plate is perpendicular to the horizontal plane; a Fabry-Perot cavity is formed between the reflecting surface disposed at one end of the mass block and the end of the optic fiber. The detected object will be in a static state after tilting, the line between the center of gravity of the mass block and its connecting point on the top plate is still perpendicular to the level plane and the F-P cavity length will have a variation. Then the change of cavity length can be measured in accordance with the Fabry-Perot principle, thereby the tilting angle of the mass block is able to be further measured. Then the tilting angle is also the inclination of the detected object.

Abstract: A system receives images of objects. The system identifies a category for each of the objects, and extracts features from the images. The features relate to a quality of the image. The features of the images are stored in a database according to the category of each object, such that each set of features is associated with its corresponding image. The system displays the images on a network-based publication system, and receives data relating to the displayed images. The data is analyzed, and the images are ranked as a function of the analysis. The system redisplays the images on the network-based publication system as a function of the ranking of the images.

Abstract: Methods are described for measuring the amount of C peptide in a sample. More specifically, mass spectrometric methods are described for detecting and quantifying C peptide in a sample utilizing on-line extraction methods coupled with tandem mass spectrometric or high resolution/high accuracy mass spectrometric techniques.

Abstract: Semiconductor die assemblies with heat sinks are disclosed herein. In one embodiment, a semiconductor die assembly includes a stack of semiconductor dies and a mold material surrounding at least a portion of the stack of semiconductor dies. A heat sink is disposed on the stack of semiconductor dies and adjacent the mold material. The heat sink includes an exposed surface and a plurality of heat transfer features along the exposed surface that are configured to increase an exposed surface area compared to a planar surface.

Abstract: The present invention relates to a barium tetraborate compound and a barium tetraborate non-linear optical crystal, and a preparation method and use thereof, wherein the chemical formulae of the barium tetraborate compound and the non-linear optical crystal thereof are both BaB4O7, with a molecular weight of 292.58; the barium tetraborate non-linear optical crystal has a non-centrosymmetric structure, which belongs to a hexagonal system, and has a space group P65 and lattice parameters of a=6.7233(6) ?, c=18.776(4) ?, V=735.01(17) ?3, and Z=6, wherein the powder frequency-doubled effect thereof is two times that of KDP (KH2PO4), and the ultraviolet cut-off edge is lower than 170 nm.

Abstract: A switching power stage for producing a load voltage may include a first processing path having a first output, a second processing path having a second output, a first plurality of switches comprising at least a first switch coupled between the first output and a first load terminal and a second switch coupled between the first output and the second load terminal, a second plurality of switches comprising at least a third switch coupled between the second output and the first load terminal and a fourth switch coupled between the second output and the second load terminal, and a controller configured to control switches in order to generate the load voltage as a function of an input signal such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic rage of the load voltage.

Abstract: A switching power stage for producing a load voltage at a load output of the switching power stage, wherein the load output comprises a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first and the second load voltages, that may include: a power converter comprising a power inductor and a plurality of switches, wherein the power converter is configured to drive a power converter output terminal; a linear amplifier configured to drive a linear amplifier output terminal; and a controller for controlling the plurality of switches and the linear amplifier in order to generate the load voltage as a function of an input signal to the controller such that energy delivered to the load output is supplied predominantly by the power converter.