Abstract: A new variable selective etching technology for thick SOI devices. An SOI material is etched by the following steps: (1) providing an SOI wafer; (2) depositing a composite hard mask with a variable selection ratio to replace a traditional hard mask with an invariable selection ratio; (3) applying a photoresist; (4) mask making, namely defining a to-be-etched region by using a photoetching plate; (5) etching the photoresist in the defined region; (6) etching the composite hard mask; (7) removing the photoresist; (8) etching top silicon by using a second etching method at a first selection ratio; and (9) etching a buried oxide layer by using a third etching method at a second selection ratio. The new variable selective etching technology avoids the damage to a side wall of a deep trench when the buried oxide layer is etched, and does not need to use an excessive thick hard mask.

Abstract: An impact-resistant balanced hydro-cylinder with pressure relief and buffering protection comprises a cylinder body (11), a piston (13), a piston rod (14), and a first valve core (21) and a second valve core (51) slidable relative to the cylinder body (11). A closed first gas cavity (22) and a closed second gas cavity (52) are respectively formed between the two valve cores and inner walls of two opposite ends of the cylinder body (11). A closed first oil cavity (32) and a closed second oil cavity (42) are respectively formed between the two valve cores and two end faces of the piston (13). A through hole (33) for the first oil cavity and a through hole (43) for the second oil cavity are respectively provided in the positions on the cylinder body (11) corresponding to the first oil cavity (32) and the second oil cavity (42).

Abstract: A homogenization field device with low specific on-resistance based on multidimensional coupled voltage dividing mechanism includes a first conductive type semiconductor substrate, a first conductive type well region, a first conductive type semiconductor contact region, a second conductive type drift region, a second conductive type well region, a second conductive type semiconductor contact region, a first dielectric oxide layer, a second dielectric oxide layer, a third dielectric oxide layer, a fourth dielectric oxide layer, a polycrystalline silicon electrode of a floating field plate, a polycrystalline silicon electrode of a control gate, a first layer of metal strips and a second layer of metal strips. The first dielectric oxide layer and the polycrystalline silicon electrode of the floating field plate form a vertical floating field plate, and the first layer of metal strips, the second layer of metal strips and the fourth dielectric oxide layer form a surface fixed dielectric capacitor.

Abstract: An SOI lateral homogenization field high voltage power semiconductor device, and a manufacturing method and application thereof are provided. The device includes a type I conductive semiconductor substrate, a type II conductive drift region, a type I field clamped layer, type I and type II conductive well regions, the first dielectric oxide layer forming a field oxide layer, the second dielectric oxide layer forming a gate oxide layer, a type II conductive buried dielectric layer, a type II conductive source heavily doped region, a type II conductive drain heavily doped region. The first dielectric oxide layer and the floating field plate polysilicon electrodes form a vertical floating field plate distributed throughout the type II conductive drift region to form a vertical floating equipotential field plate array. When the device is in on-state, high doping concentration can be realized by the full-region depletion effect form the vertical field plate arrays.

Abstract: The present disclosure relates to a hydraulic support with a quick response function for coal wall spalling, which includes a base, an upright post, a top beam, an extensible canopy, a face guard, and a vibration meter. The vibration meter is mounted on a hydraulic support, and detects a vibration signal of a coal wall in a non-contact mode. The face guard includes a primary face guard, a secondary face guard, and a tertiary face guard connected in sequence. One side, close to a coal wall, of the primary face guard is connected to a quick response device. The quick response device is in signal communication with the vibration meter. After receiving the vibration signal of the coal wall, the quick response device is abutted against the coal wall before the secondary face guard and the tertiary face guard fit the coal wall.

Abstract: An SOI lateral homogenization field high voltage power semiconductor device, and a manufacturing method and application thereof are provided. The device includes a type I conductive semiconductor substrate, a type II conductive drift region, a type I field clamped layer, type I and type II conductive well regions, the first dielectric oxide layer forming a field oxide layer, the second dielectric oxide layer forming a gate oxide layer, a type II conductive buried dielectric layer, a type II conductive source heavily doped region, a type II conductive drain heavily doped region. The first dielectric oxide layer and the floating field plate polysilicon electrodes form a vertical floating field plate distributed throughout the type II conductive drift region to form a vertical floating equipotential field plate array. When the device is in on-state, high doping concentration can be realized by the full-region depletion effect form the vertical field plate arrays.

Abstract: An impact-resistant balanced hydro-cylinder with pressure relief and buffering protection comprises a cylinder body (11), a piston (13), a piston rod (14), and a first valve core (21) and a second valve core (51) slidable relative to the cylinder body (11). A closed first gas cavity (22) and a closed second gas cavity (52) are respectively formed between the two valve cores and inner walls of two opposite ends of the cylinder body (11). A closed first oil cavity (32) and a closed second oil cavity (42) are respectively formed between the two valve cores and two end faces of the piston (13). A through hole (33) for the first oil cavity and a through hole (43) for the second oil cavity are respectively provided in the positions on the cylinder body (11) corresponding to the first oil cavity (32) and the second oil cavity (42).

Abstract: A bidirectional Metal-Oxide-Semiconductor (MOS) device, including a P-type substrate, and an active region. The active region includes a drift region, a first MOS structure and a second MOS structure; the first MOS structure includes a first P-type body region, a first P+ contact region, a first N+ source region, a first metal electrode, and a first gate structure; the second MOS structure includes a second P-type body region, a second P+ contact region, a second N+ source region, a second metal electrode, and a second gate structure; and the drift region includes a dielectric slot, a first N-type layer, a second N-type layer, and an N-type region. The active region is disposed on the upper surface of the P-type substrate. The first MOS structure and the second MOS structure are symmetrically disposed on two ends of the upper layer of the drift region.

Abstract: A bidirectional Metal-Oxide-Semiconductor (MOS) device, including a P-type substrate, and an active region. The active region includes a drift region, a first MOS structure and a second MOS structure; the first MOS structure includes a first P-type body region, a first P+ contact region, a first N+ source region, a first metal electrode, and a first gate structure; the second MOS structure includes a second P-type body region, a second P+ contact region, a second N+ source region, a second metal electrode, and a second gate structure; and the drift region includes a dielectric slot, a first N-type layer, a second N-type layer, and an N-type region. The active region is disposed on the upper surface of the P-type substrate. The first MOS structure and the second MOS structure are symmetrically disposed on two ends of the upper layer of the drift region.

Abstract: SOI devices for plasma display panel driver chip, include a substrate, a buried oxide layer and an n-type SOI layer in a bottom-up order, where the SOI layer is integrated with an HV-NMOS device, an HV-PMOS device, a Field-PMOS device, an LIGBT device, a CMOS device, an NPN device, a PNP device and an HV-PNP device; the SOI layer includes an n+ doped region within the SOI layer at an interface between the n-type SOI layer and the buried oxide layer; and the n+ doped region has a higher doping concentration than the n-type SOI layer.

Abstract: SOI devices for plasma display panel driver chip, include a substrate, a buried oxide layer and an n-type SOI layer in a bottom-up order, where the SOI layer is integrated with an HV-NMOS device, an HV-PMOS device, a Field-PMOS device, an LIGBT device, a CMOS device, an NPN device, a PNP device and an HV-PNP device; the SOI layer includes an n+ doped region within the SOI layer at an interface between the n-type SOI layer and the buried oxide layer; and the n+ doped region has a higher doping concentration than the n-type SOI layer.