Abstract: The method for preparing the semiconductor structure includes: providing a substrate; successively arranging a first conductive material layer, a barrier material layer, a second conductive material layer and a first dielectric material layer on the substrate stacked onto one another; forming a supporting layer on the first dielectric material layer, in which the supporting layer includes a plurality of supporting pattern structures spaced apart from each other, and a first trench is provided between two adjacent supporting pattern structures; forming a second dielectric layer, in which the second dielectric layer fills the first trench; etching the second dielectric layer, the first dielectric material layer, the second conductive material layer, the barrier material layer and the first conductive material layer to form a bit line array; and forming a bit line protective layer.

Abstract: A method of manufacturing a semiconductor structure and a semiconductor structure are disclosed. The method of manufacturing a semiconductor structure includes: providing a substrate; forming a multilayer film stack on the substrate; forming a supporter at a top of the multilayer film stack; and etching the multilayer film stack to form a plurality of gate structures arranged at intervals along a first direction, where the supporter penetrates a top of each of the plurality of gate structures and extends along the first direction.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, bit line structures distributed at intervals, initial support pattern structures distributed at intervals and target conductive contact structures. The bit line structures distributed at intervals are located on the substrate, and the bit line structures extend along a first direction. Each of the initial support pattern structures runs through top regions of the bit line structures, the initial support pattern structures extend along a second direction, and the first direction intersects with the second direction. Each of the target conductive contact structures is located within adjacent bit line structures and adjacent initial support pattern structures, and each of the target conductive contact structures includes a conductive plug structure and a target protective layer covering an outer sidewall of the conductive plug structure.

Abstract: A semiconductor structure includes a substrate, wire structures, support structures and storage node contact structures. Each wire structure includes a wire and an isolation structure located on the wire. The wire structures extend along a first direction. The support structures are located on a side of the wire structures away from the substrate. The support structures are arranged at intervals in the first direction and connected with the isolation structures. The support structures extend along a second direction, and the second direction intersects with the first direction. The storage node contact structures are arranged in contact holes, and each of the contact holes is located within adjacent wire structures and adjacent support structures. A first air gap structure is provided between each of the storage node contact structures and a wire structure adjacent to the storage node contact structure.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The semiconductor structure includes: a base, where the base includes a memory array region and a peripheral circuit region around the memory array region; a plurality of buried bit lines disposed in the memory array region of the base; and at least one buried gate disposed in the peripheral circuit region of the base.

Abstract: The present disclosure provides a method of manufacturing a buried bit line structure and a buried bit line structure. The method of manufacturing a buried bit line structure includes: providing an initial structure, the initial structure including active region structures; forming an initial bit line trench, the initial bit line trench exposing the active region structure; forming a conductive structure, the conductive structure being located at the bottom of the initial bit line trench; forming a bit line contact structure, the bit line contact structure covering the conductive structure, and a top surface of the bit line contact structure being lower than a top surface of the active region structure; and forming an insulation structure, the insulation structure covering the bit line contact structure.

Abstract: A forming method of a semiconductor structure includes the following: providing a semiconductor substrate formed with a first mask layer having a preset pattern; forming a second mask layer having a first mask pattern on a surface of the first mask layer, wherein the first mask pattern includes a plurality of first sub-patterns arranged in sequence; forming a second mask pattern in the second mask layer through the first mask pattern in a self-alignment manner, wherein the second mask pattern includes the first sub-patterns of the first mask pattern and second sub-patterns corresponding to the first sub-patterns; etching the first mask layer based on the first sub-patterns and the second sub-patterns of the second mask pattern to convert the preset pattern into an active area pattern; and defining active areas in the semiconductor substrate based on the active area pattern.

Abstract: The present disclosure relates to a method for manufacturing a semiconductor structure, the method includes: a substrate is provided; a bit line array is formed on an upper surface of the substrate, the bit line array includes several bit lines arranged at intervals, the bit lines are connected through at least one support pattern, and the at least one support pattern penetrates through the bit line array along an arrangement direction of the bit lines; a bit line side wall is formed on side walls of each of the bit lines; a part of the at least one support pattern is removed so as to expose at least one sacrificial layer; and the at least one sacrificial layer is removed, so as to form at least one air gap between the first side wall dielectric layers and the second side wall dielectric layers.

Abstract: The method for preparing the semiconductor structure includes: providing a substrate; successively arranging a first conductive material layer, a barrier material layer, a second conductive material layer and a first dielectric material layer on the substrate stacked onto one another; forming a supporting layer on the first dielectric material layer, in which the supporting layer includes a plurality of supporting pattern structures spaced apart from each other, and a first trench is provided between two adjacent supporting pattern structures; forming a second dielectric layer, in which the second dielectric layer fills the first trench; etching the second dielectric layer, the first dielectric material layer, the second conductive material layer, the barrier material layer and the first conductive material layer to form a bit line array; and forming a bit line protective layer.

Abstract: A cleaning process for cleaning a surface of a semiconductor structure is provided, in which residue layer is formed on the surface of the semiconductor structure. The cleaning process includes providing a first reaction gas and a second reaction gas to the surface of the semiconductor structure, in which the first reaction gas reacts with the second reaction gas to remove the residue layer while forming a protection layer on the surface of the semiconductor structure.