Patents by Inventor Zhaoqiang QIU

Zhaoqiang QIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data storage method for speech-related DNN operations
    Patent number: 11734551
    Abstract: A data storage method for speech-related deep neural network (DNN) operations, characterized by comprising the following steps: 1. determining the configuration parameters by a user; 2. configuring a peripheral storage access interface; 3. configuring a multi-transmitting interface of feature storage array; 4. enabling CPU to store to-be-calculated data in a storage space between the feature storage space start address and the feature storage space end address of the peripheral storage device; 5. after data storage, enabling CPU to check the state of the peripheral storage access interface and the multi-transmitting interface of feature storage array; 6. upon receiving a transportation completion signal of the peripheral storage access interface by CPU, enabling the multi-transmitting interface of feature storage array. 7. upon receiving a transportation completion signal of the multi-transmitting interface of feature storage array by CPU, repeating step 6.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: August 22, 2023
    Assignee: CHIPINTELLI TECHNOLOGY CO., LTD
    Inventors: Zhaoqiang Qiu, Lai Zhang, Fujun Wang, Wei Tian, Yingbin Yang, Yangyang Pei
  • DATA STORAGE METHOD FOR SPEECH-RELATED DNN OPERATIONS
    Publication number: 20220284276
    Abstract: A data storage method for speech-related deep neural network (DNN) operations, characterized by comprising the following steps: 1. determining the configuration parameters by a user; 2. configuring a peripheral storage access interface; 3. configuring a multi-transmitting interface of feature storage array; 4. enabling CPU to store to-be-calculated data in a storage space between the feature storage space start address and the feature storage space end address of the peripheral storage device; 5. after data storage, enabling CPU to check the state of the peripheral storage access interface and the multi-transmitting interface of feature storage array; 6. upon receiving a transportation completion signal of the peripheral storage access interface by CPU, enabling the multi-transmitting interface of feature storage array. 7. upon receiving a transportation completion signal of the multi-transmitting interface of feature storage array by CPU, repeating step 6.
    Type: Application
    Filed: December 10, 2021
    Publication date: September 8, 2022
    Applicant: CHIPINTELLI TECHNOLOGY CO., LTD
    Inventors: Zhaoqiang QIU, Lai ZHANG, Fujun WANG, Wei TIAN, Yingbin YANG, Yangyang PEI