Patents by Inventor Zhaoxia Bi
Zhaoxia Bi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220246797Abstract: A method for fabrication of an InGaN semiconductor template, comprising growing an InGaN pyramid having inclined facets on a semiconductor substrate; processing the pyramid by removing semiconductor material to form a truncated pyramid having a first upper surface; growing InGaN, over the first upper surface, to form an InGaN template layer having a c-plane crystal facet forming a top surface. The InGaN semiconductor template is suitable for further fabrication of semiconductor devices, such as microLEDs configured to emit red, green or blue light.Type: ApplicationFiled: March 18, 2020Publication date: August 4, 2022Inventors: Zhaoxia BI, Jonas OHLSSON, Lars SAMUELSON
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Patent number: 11342477Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first III-nitride material through a mask provided over a substrate; growing a second III-nitride semiconductor material; planarizing the grown second semiconductor material to form a plurality of discrete base elements having a substantially planar upper surface. Preferably the step of planarizing involves performing atomic distribution of III type atoms of the grown second semiconductor material under heating to form the planar upper surface, and without supply of III type atoms is carried out during the step of planarization.Type: GrantFiled: February 13, 2017Date of Patent: May 24, 2022Assignee: HEXAGEM ABInventors: Lars Samuelson, Jonas Ohlsson, Zhaoxia Bi
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Publication number: 20210202236Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first Ill-nitride material through a mask provided over a substrate; growing a second Ill-nitride semiconductor material on the seeds; planarizing the grown second semiconductor material to form a cohesive structure from the plurality of discrete base elements, said cohesive structure having a substantially planar upper surface.Type: ApplicationFiled: April 3, 2017Publication date: July 1, 2021Inventors: Jonas Ohlsson, Lars Samuelson, Zhaoxia Bi, Rafal Ciechonski, Kristian Storm
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Publication number: 20210184071Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first III-nitride material through a mask provided over a substrate; growing a second III-nitride semiconductor material; planarizing the grown second semiconductor material to form a plurality of discrete base elements having a substantially planar upper surface. Preferably the step of planarizing involves performing atomic distribution of III type atoms of the grown second semiconductor material under heating to form the planar upper surface, and without supply of III type atoms is carried out during the step of planarization.Type: ApplicationFiled: February 13, 2017Publication date: June 17, 2021Inventors: Lars Samuelson, Jonas Ohlsson, Zhaoxia Bi
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Patent number: 9947831Abstract: A light emitting diode (LED) includes a plurality of Group III-nitride nanowires extending from a substrate, at least one Group III-nitride pyramidal shell layer located on each of the plurality of Group III-nitride nanowires, a continuous Group III-nitride pyramidal layer located over the at least one Group III-nitride pyramidal shell layer, and a continuous pyramidal contact layer located over the continuous Group III-nitride pyramidal layer. The at least one Group III-nitride pyramidal shell layer is located in an active region of the LED. The plurality of Group III-nitride nanowires are doped one of n- or p-type. The continuous Group III-nitride pyramidal layer is doped another one of p- or n-type to form a junction with the plurality of Group III-nitride nanowires. A distance from a side portion of the continuous contact layer to the plurality of Group III-nitride nanowires is shorter than a distance of an apex of the continuous contact layer to the plurality of Group III-nitride nanowires.Type: GrantFiled: April 21, 2017Date of Patent: April 17, 2018Assignee: QUNANO ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi, Jonas Ohlsson, Lars Ivar Samuelson
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Publication number: 20170229613Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: ApplicationFiled: April 21, 2017Publication date: August 10, 2017Inventors: Werner Seifert, Damir Asoli, Zhaoxia Bi, Jonas Ohlsson, Lars Ivar Samuelson
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Patent number: 9660136Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: GrantFiled: April 14, 2015Date of Patent: May 23, 2017Assignee: QUNANO ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi, Jonas Ohlsson, Lars Ivar Samuelson
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Publication number: 20150221817Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: ApplicationFiled: April 14, 2015Publication date: August 6, 2015Inventors: Werner Seifert, Damir Asoli, Zhaoxia Bi, Jonas Ohlsson, Lars Ivar Samuelson
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Patent number: 9024338Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: GrantFiled: November 7, 2013Date of Patent: May 5, 2015Assignee: QuNano ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi, Jonas Ohlsson, Lars Ivar Samuelson
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Publication number: 20140061586Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: ApplicationFiled: November 7, 2013Publication date: March 6, 2014Applicant: QuNano ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi
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Patent number: 8664094Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: GrantFiled: October 18, 2012Date of Patent: March 4, 2014Assignee: QuNano ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi
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Patent number: 8309439Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: GrantFiled: November 8, 2010Date of Patent: November 13, 2012Assignee: QuNano ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi
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Publication number: 20110143472Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: ApplicationFiled: November 8, 2010Publication date: June 16, 2011Applicant: QuNano ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi
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Patent number: 7829443Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: GrantFiled: January 14, 2008Date of Patent: November 9, 2010Assignee: QuNano ABInventors: Werner Seifert, Damir Asoli, Zhaoxia Bi
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Publication number: 20100163840Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.Type: ApplicationFiled: January 14, 2008Publication date: July 1, 2010Inventors: Werner Seifert, Damir Asoli, Zhaoxia Bi