Patents by Inventor Zhechao Wang

Zhechao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094468
    Abstract: Various embodiments disclosed herein describe photonic passive delay lines that have a waveguide wound into a plurality of straight segments and bends. The photonic passive delay lines are configured to reduce losses from parasitic modes of light generated at the bends. Embodiments of the photonic passive delay lines vary the dimensions of the straight segments to provide different amounts of dephasing between a mode of input light received by the photonic passive delay line and one or more parasitic modes.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 21, 2024
    Inventors: Jason S. Pelc, Yu Miao, Mark A. Arbore, Meng Huang, Zhechao Wang
  • Publication number: 20210026069
    Abstract: The display system for 3D light field generation comprises a photonic circuit comprising a plurality of light emitting units, wherein each light emitting unit comprises a light intensity modulator, and the display system comprises a phased liquid crystal array adapted to control the exiting optical angle of light for emission angle steering. The operations of light intensity modulators and the phased liquid crystal array are synchronized when reconstructing a light field of a virtual 3D object viewed by a user's eye.
    Type: Application
    Filed: March 30, 2018
    Publication date: January 28, 2021
    Inventors: Roeland BAETS, Zhechao WANG, Qing YANG, Xu LIU, Haifeng LI
  • Patent number: 9413139
    Abstract: The present disclosure relates to a method for integrating a sub-micron III-V waveguide laser on a semiconductor photonics platform as well as to a corresponding device/system. The method comprises providing on a semiconductor substrate an electrically insulating layer, etching a trench having a width in the range between 50 nm and 800 nm through the electrically insulating layer, thereby locally exposing the silicon substrate, providing a III-V layer stack in the trench by local epitaxial growth to form a channel waveguide, and providing a light confinement element for confining radiation in the local-epitaxial-grown channel waveguide.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: August 9, 2016
    Assignees: IMEC VZW, Universiteit Gent
    Inventors: Dries Van Thourhout, Zhechao Wang, Joris Van Campenhout, Maria Ioanna Pantouvaki
  • Publication number: 20150333481
    Abstract: The present disclosure relates to a method for integrating a sub-micron III-V waveguide laser on a semiconductor photonics platform as well as to a corresponding device/system. The method comprises providing on a semiconductor substrate an electrically insulating layer, etching a trench having a width in the range between 50 nm and 800 nm through the electrically insulating layer, thereby locally exposing the silicon substrate, providing a III-V layer stack in the trench by local epitaxial growth to form a channel waveguide, and providing a light confinement element for confining radiation in the local-epitaxial-grown channel waveguide.
    Type: Application
    Filed: July 1, 2014
    Publication date: November 19, 2015
    Applicants: UNIVERSITEIT GENT, IMEC VZW
    Inventors: Dries Van Thourhout, Zhechao Wang, Joris Van Campenhout, Maria Ioanna Pantouvaki