Abstract: A method of forming a uniform self-aligned low-k layer with a large process window for inserting a memory array with pillar/convex topography and the resulting device are provided. Embodiments include forming a substrate with a first region and a second region; forming a first low-K layer over the substrate; forming an oxide layer over the first low-K layer; forming a spacer over the oxide layer; etching the spacer to expose the oxide layer in the first region; removing the oxide layer and a portion of the first low-K layer in the first region and a portion of the oxide layer and a portion of the spacer in the second region; removing the spacer in the second region; cleaning the first low-K layer and the oxide layer, a triangular-like shaped portion of the oxide layer remaining; and forming a second low-K layer over the substrate.

Abstract: The technology described herein is generally directed towards an integrated high-radix strictly non-blocking optical switching fabric, such as for use for intra-rack communication within racks in a data center. The fabric may be configured with any number of ports. A general topology of optical components, along with a routing controller (e.g., algorithm/mechanism), results in an optical switching fabric architecture that provides bidirectional routing, in a high-performance, high bandwidth, highly robust switching fabric that is also low in power consumption and low latency.

Abstract: The technology described herein is generally directed towards an integrated high-radix strictly non-blocking optical switching fabric, such as for use for intra-rack communication within racks in a data center. The fabric may be configured with any number of ports. A general topology of optical components, along with a routing controller (e.g., algorithm/mechanism), results in an optical switching fabric architecture that provides bidirectional routing, in a high-performance, high bandwidth, highly robust switching fabric that is also low in power consumption and low latency.

Abstract: A 4H X-ray camera includes a high speed, high atomic number (Z), high spatial resolution sensor for sensing X-rays having energy over 30 keV and high speed readout electronics, and the high speed, high atomic number (Z), high spatial resolution sensor is coupled to the high speed readout electronics.

Abstract: A reliable metal insulator metal (MIM) capacitor is disclosed. The MIM capacitor is disposed over at least an interlevel dielectric (ILD) layer of a plurality of ILD layers with interconnects disposed over a substrate. The MIM capacitor includes a capacitor dielectric disposed between top and bottom metal capacitor electrodes. The edges of the top metal electrode at the interface with the capacitor dielectric are rounded. The rounded edges of the top capacitor electrode at the interface with the capacitor dielectric reduce edge electric field, thereby improves time-dependent dielectric breakdown (TDDB) reliability of the capacitor.

Abstract: A method of forming a uniform self-aligned low-k layer with a large process window for inserting a memory array with pillar/convex topography and the resulting device are provided. Embodiments include forming a substrate with a first region and a second region; forming a first low-K layer over the substrate; forming an oxide layer over the first low-K layer; forming a spacer over the oxide layer; etching the spacer to expose the oxide layer in the first region; removing the oxide layer and a portion of the first low-K layer in the first region and a portion of the oxide layer and a portion of the spacer in the second region; removing the spacer in the second region; cleaning the first low-K layer and the oxide layer, a triangular-like shaped portion of the oxide layer remaining; and forming a second low-K layer over the substrate.

Abstract: A reliable metal insulator metal (MIM) capacitor is disclosed. The MIM capacitor is disposed over at least an interlevel dielectric (ILD) layer of a plurality of ILD layers with interconnects disposed over a substrate. The MIM capacitor includes a capacitor dielectric disposed between top and bottom metal capacitor electrodes. The edges of the top metal electrode at the interface with the capacitor dielectric are rounded. The rounded edges of the top capacitor electrode at the interface with the capacitor dielectric reduce edge electric field, thereby improves time-dependent dielectric breakdown (TDDB) reliability of the capacitor.

Abstract: A method of forming a uniform self-aligned low-k layer with a large process window for inserting a memory array with pillar/convex topography and the resulting device are provided. Embodiments include forming a substrate with a first region and a second region; forming a first low-K layer over the substrate; forming an oxide layer over the first low-K layer; forming a spacer over the oxide layer; etching the spacer to expose the oxide layer in the first region; removing the oxide layer and a portion of the first low-K layer in the first region and a portion of the oxide layer and a portion of the spacer in the second region; removing the spacer in the second region; cleaning the first low-K layer and the oxide layer, a triangular-like shaped portion of the oxide layer remaining; and forming a second low-K layer over the substrate.

Abstract: A method of forming a uniform self-aligned low-k layer with a large process window for inserting a memory array with pillar/convex topography and the resulting device are provided. Embodiments include forming a substrate with a first region and a second region; forming a first low-K layer over the substrate; forming an oxide layer over the first low-K layer; forming a spacer over the oxide layer; etching the spacer to expose the oxide layer in the first region; removing the oxide layer and a portion of the first low-K layer in the first region and a portion of the oxide layer and a portion of the spacer in the second region; removing the spacer in the second region; cleaning the first low-K layer and the oxide layer, a triangular-like shaped portion of the oxide layer remaining; and forming a second low-K layer over the substrate.

Abstract: Methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit includes forming a stack gate structure overlying a semiconductor substrate. The method forms a select gate material overlying the stack gate structure and the semiconductor substrate and having a planar surface overlying the stack gate structure. The method includes anisotropically etching the select gate material to define a select gate adjacent the stack gate structure, wherein the select gate is formed with a planar upper surface.

Abstract: A double-helix Boron-10 powder detector having intrinsic thermal neutron detection efficiency comparable to 36? long, 2-in diameter, 2-bar Helium-3 detectors, and which can be used to replace such detectors for use in portal monitoring, is described. An embodiment of the detector includes a metallic plate coated with Boron-10 powder for generating alpha and Lithium-7 particles responsive to neutrons impinging thereon supported by insulators affixed to at least two opposing edges; a grounded first wire wound in a helical manner around two opposing insulators; and a second wire having a smaller diameter than that of the first wire, wound in a helical manner around the same insulators and spaced apart from the first wire, the second wire being positively biased.

Abstract: Semiconductor devices and methods of making thereof are disclosed. The semiconductor device includes a substrate prepared with a first dielectric layer formed thereon. The dielectric layer includes at least first, second and third contact regions. A second dielectric layer is disposed over the first dielectric layer. The device also includes at least first, second and third via contacts disposed in the second dielectric layer. The via contacts are coupled to the respective underlying contact regions and the via contacts do not extend beyond the underlying contact regions.

Abstract: Apparatus and method for separating neutron-induced 4He (or other nuclei) recoil from background, which is predominantly gamma-ray induced electrons and cosmic rays, using software analysis of digitized electrical pulses generated in a six tube, high-pressure (11 bar) helium-4 (4He) detector, are described. Individual electrical pulses from the detector were recorded using a 12-bit digitizer, and differences in pulse rise time and amplitudes, due to different energy loss of neutrons and gamma rays, are used for neutron/gamma ray separation.

Abstract: A double-helix Boron-10 powder detector having intrinsic thermal neutron detection efficiency comparable to 36? long, 2-in diameter, 2-bar Helium-3 detectors, and which can be used to replace such detectors for use in portal monitoring, is described. An embodiment of the detector includes a metallic plate coated with Boron-10 powder for generating alpha and Lithium-7 particles responsive to neutrons impinging thereon supported by insulators affixed to at least two opposing edges; a grounded first wire wound in a helical manner around two opposing insulators; and a second wire having a smaller diameter than that of the first wire, wound in a helical manner around the same insulators and spaced apart from the first wire, the second wire being positively biased.

Abstract: Semiconductor devices and methods of making thereof are disclosed. The semiconductor device includes a substrate prepared with a first dielectric layer formed thereon. The dielectric layer includes at least first, second and third contact regions. A second dielectric layer is disposed over the first dielectric layer. The device also includes at least first, second and third via contacts disposed in the second dielectric layer. The via contacts are coupled to the respective underlying contact regions and the via contacts do not extend beyond the underlying contact regions.

Abstract: High-efficiency neutron detector substrate assemblies comprising a first conductive substrate, wherein a first side of the substrate is in direct contact with a first layer of a powder material comprising 10boron, 10boron carbide or combinations thereof, and wherein a conductive material is in proximity to the first layer of powder material; and processes of making said neutron detector substrate assemblies.

Abstract: The present invention relates to a method of manufacturing optical waveguide devices. The order of patterning/etch in the method is first a deeper etching then shallow etching. In some embodiments, the first etching forms a mesa and the second etching removes a portion of material that comprises the mesa. In addition, there can be a planarization step. The deeper trenches are desirably conducive to filling. The method may use a cross-lithography method to reduce alignment errors between multiple patterning/etching steps. The method may use an oxidation and stripping off process to smooth a surface of the waveguide and/or reduce an initial dimension of the waveguide.

Abstract: High-efficiency neutron detector substrate assemblies comprising a first conductive substrate, wherein a first side of the substrate is in direct contact with a first layer of a powder material having a thickness of from about 50 nm to about 250 nm and comprising 10boron, 10boron carbide or combinations thereof, and wherein a conductive material is in proximity to the first layer of powder material; and processes of making said neutron detector substrate assemblies.

Abstract: High-efficiency neutron detector substrate assemblies comprising a first conductive substrate, wherein a first side of the substrate is in direct contact with a first layer of a powder material comprising 10boron, 10boron carbide or combinations thereof, and wherein a conductive material is in proximity to the first layer of powder material; and processes of making said neutron detector substrate assemblies.

Abstract: A velocimetry apparatus and method comprising splitting incoming reflected laser light and directing the laser light into first and second arms, filtering the laser light with passband filters in the first and second arms, one having a positive passband slope and the other having a negative passband slope, and detecting the filtered laser light via light intensity detectors following the passband filters in the first and second arms.