Abstract: A method for determining a vortex-induced resonance region of a wind turbine blade and an anti-vortex device are provided, and relates to the technical field of wind power equipment. The method includes: obtaining the natural frequency of the wind turbine blade; segmenting the wind turbine blade to obtain a plurality of blade sections; calculating a vortex shedding frequency of a cross section of each of the plurality of blade sections at different wind speeds or under different operating conditions; and determining at least one vortex-induced resonance region of the wind turbine blade by comparing the vortex shedding frequency of the cross section of each of the plurality of blade sections at different wind speeds or under different operating conditions with the natural frequency.

Abstract: Provided are an anti-vortex device for a wind turbine blade and an installation method thereof, relating to the technical field of wind power equipment. In the present disclosure, a plurality of second binding strap assemblies are arranged with intervals sequentially along the extension direction of the wind turbine blade within a target region of the wind turbine blade, where the target region is between the blade tip region and a blade root of the wind turbine blade, and then the plurality of first binding strap assemblies are connected to the plurality of second binding strap assemblies by at least one first connecting member, with one end of each of the at least one first connecting member connected to the blade root of the wind turbine blade.

Abstract: Provided are a medical hydrogel containing ultrasonically-imageable bubble microspheres and a preparation method thereof. The medical hydrogel containing the ultrasonically-imageable bubble microspheres is formed by in-situ crosslinking of a polyethylene glycol precursor solution and a poly-amino crosslinker solution containing bubble microspheres, the polyethylene glycol precursor solution consisting of a multi-arm polyethylene glycol derivative and a buffer solution A.

Abstract: The present disclosure provides a semiconductor structure and a fabrication method thereof, a semiconductor device and a fabrication method thereof, and relate to the technical field of semiconductors. The semiconductor structure includes an interconnection layer and a bonding layer. The interconnection layer includes a first interconnection portion and a second interconnection portion. The bonding layer includes a bonding portion and a third interconnection portion. The first interconnection portion is connected with the second interconnection portion through the third interconnection portion. In the semiconductor structure provided by an example of the present disclosure, interconnection portions in the interconnection layer can be reduced by disposing the third interconnection portion in the bonding layer, thereby reducing the cost.

Abstract: Three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. In certain aspects, a disclosed 3D memory device can comprise a plurality of memory regions each comprising a memory stack and a plurality of channel structures vertically extending through the memory stack, a spacer region between the plurality of memory regions, comprising a dielectric stack located between adjacent memory stacks, and a patterned conductive layer on the memory stacks and the dielectric stack. The patterned conductive layer comprises interconnection structures in the memory regions and coupled with the plurality of channel structures, and dummy interconnection structures on the dielectric stack in the spacer region and arranged in a staggered manner.

Abstract: The present disclosure relates to methods, devices, systems, and techniques for managing a high bandwidth memory (HBM). An example semiconductor device includes a control die and wafers stacked together along a first direction. Each of the wafers includes a semiconductor substrate extending along a second direction perpendicular to the first direction and semiconductor structures on a side of the semiconductor substrate. The control die is coupled to the semiconductor structures of each of the wafers by contact structures extending through a corresponding semiconductor substrate of at least one of the wafers along the first direction.

Abstract: The present disclosure discloses a medical hydrogel, formed by in-situ crosslinking an aldehyde-terminated multi-arm star polyethylene glycol and a polyamino compound, wherein the aldehyde group and the multi-arm star polyethylene glycol are linked by a chemical bond such as an ether bond, an amide bond, an ester bond, a urethane bond, an imine bond, or a urea bond, and the molar ratio of the amino in the polyamino compound to the aldehyde group in the aldehyde-terminated multi-arm star polyethylene glycol is 0.4-4.4:1. The polyamino compound is polylysine or a mixture of polylysine and polyethylenimine in a molar ratio of 2-30:3. The hydrogel of the present disclosure gels rapidly, has a long-term stability in an aqueous solution, and still has good swelling property and stability after a plurality of radiations, and thus can be used as a medical radiotherapy protection spacer for radiation protection.

Abstract: The present disclosure relates to semiconductor package structures and fabrication methods thereof. An example method includes providing a first semiconductor structure, a second semiconductor structure, and a carrier structure. The method further includes bonding the first semiconductor structure and the second semiconductor structure to a surface of the carrier structure, where the first semiconductor structure and the second semiconductor structure are disposed at different positions on the surface.

Abstract: The present disclosure discloses a medical hydrogel, formed by in-situ crosslinking an aldehyde-terminated multi-arm star polyethylene glycol and a polyamino compound, wherein the aldehyde group and the multi-arm star polyethylene glycol are linked by a chemical bond such as an ether bond, an amide bond, a urethane bond, an imine bond, or a urea bond. In the present disclosure, the aldehyde group at the end of the multi-arm polyethylene glycol reacts with the amino group in the polyamino compound to produce Schiff base for crosslinking, so that the medical injectable gel is formed. The prepared gel has a short gelling time, a desired gel burst strength, and a good stability in an aqueous solution, and therefore has greater application value than existing medical gels.

Abstract: The present disclosure relates to the technical field of microsphere drug preparations, in particular to an octreotide acetate sustained-release microsphere as well as a preparation method therefor and use thereof. The preparation method includes the following steps: S1, dissolving a polylactic acid-co-glycolic acid copolymer in a first organic solvent to prepare an oil phase 1; and dissolving octreotide acetate in a second organic solvent to prepare an oil phase 2; S2, adding the oil phase 2 into the oil phase 1 under stirring conditions to obtain a suspension containing octreotide acetate; S3, transferring the suspension to an aqueous phase, and performing emulsifying to obtain a semi-cured drug-loaded microsphere; and S4, transferring the semi-cured drug-loaded microsphere to a curing phase, and removing the solvents to obtain the octreotide acetate sustained-release microsphere.

Abstract: The present disclosure discloses a hydrogel kit capable of being quickly dissolved on demand, which includes a gel system and a dissolving solution, and a use volume ratio of the gel system to the dissolving solution is 1:(2-10). According to the present disclosure, under the combined action of an aldehyde group-terminated star-shaped multi-arm polyethylene glycol gel system and a water-soluble amino compound dissolving solution, rapid degradation of a gel can be achieved, gel degradation is achieved within half an hour, and the problem that inflammations are caused to the body after functional requirements of the gel are met is avoided. Moreover, the pH value of the water-soluble amino compound dissolving solution is controlled to be 3-7.5, such that low-temperature rapid degradation of the gel system can be achieved, and the degradation time is controlled to be less than 30 min.

Abstract: In some aspects, a package structure includes a substrate and semiconductor devices stacked over the substrate. The semiconductor devices are stacked along a first direction, and at least one of the semiconductor devices comprises one or more pads located on a side surface of the at least one of the semiconductor devices.

Abstract: In one example, a semiconductor device includes a conductive layer, composite structures, conductive posts and first pads. The composite structures may be located on the conductive layer and stacked in a direction perpendicular to the plane in which the conductive layer is located. The composite structure may include a chip, an insulating layer surrounding around the chip, and at least one second pad electrically connected with the chip. The second pad is located on the insulating layer. The second pads of the composite structures are at different locations in the first direction. The first direction is perpendicular to the thickness direction of the composite structures. The conductive posts are located in the insulating layer of the composite structures and each conductive post is connected with one of the second pads and one of the first pads.

Abstract: Disclosed are three-dimensional (3D) memory devices and fabricating methods thereof. In some embodiments, a disclosed memory device comprises a wafer structure having a sealing region and a chip region. The wafer structure comprises a substrate, a memory string array on a first side of the substrate in the chip region, a first protection structure and a second protection structure on the first side of the substrate in the sealing region, and a first contact and a second contact extending through the substrate in the sealing region. The first contact is in contact with the first protection structure, and the second contact is in contact with the second protection structure.

Abstract: Disclosed are three-dimensional (3D) memory devices and fabricating methods thereof. In some embodiments, a disclosed memory device comprises a wafer structure having a sealing region and a chip region. The wafer structure comprises a substrate, a memory string array on a first side of the substrate in the chip region, a first protection structure and a second protection structure on the first side of the substrate in the sealing region, and a first contact and a second contact extending through the substrate in the sealing region. The first contact is in contact with the first protection structure, and the second contact is in contact with the second protection structure.

Abstract: Examples of the present disclosure propose a semiconductor structure and a fabrication method thereof, a memory device, and a memory system. The semiconductor structure includes at least one deck structure. The fabrication method of the deck structure includes: providing a first stack structure in which a peripheral circuit is disposed; forming a first contact and a second contact at least penetrating through the first stack structure; providing a second stack structure in which a memory cell array is disposed; forming a third contact and a fourth contact penetrating through the second stack structure; stacking and bonding the first stack structure and the second stack structure along a first direction to form the deck structure, wherein the first contact is connected with the third contact by bonding to form a first interconnection structure, and the second contact is connected with the fourth contact by bonding to form a second interconnection structure.

Abstract: The present disclosure discloses a memory, a fabrication method thereof, and a memory system. According to an example, the memory includes a substrate, a device layer, a padding layer and a buffering protection layer. The device layer is disposed on the substrate, the padding layer is disposed at a first side of the device layer, the buffering protection layer is disposed on a second side of the device layer and a side of the padding layer away from the substrate. The padding layer is disposed to be adjacent to the device layer in a direction parallel to the substrate.

Abstract: Implementations of the present disclosure include a semiconductor structure comprising a stack structure comprising a first stack layer and a second stack layer stacked together, wherein a first region and a second region surrounding the first region are disposed in the stack structure, and a first surface of the first region and a first surface of the second region are coplanar; and a filling structure located on a second surface of the second region, wherein the second surface and the first surface of the second region are respectively two surfaces of the second region disposed oppositely in a first direction that is parallel to a stack layer extending direction of the stack structure.

Abstract: An example computing device includes a printed circuit board comprising: a first layer including one or more ground signal paths; a second layer including one or more ground signal paths; a third layer disposed between the first layer and the second layer; a radar antenna portion comprising a first radar antenna and electrically connected to a distal connector of the printed circuit board; a radar clock signal line configured to convey a radar clock signal between the radar antenna portion and the distal connector; and a first ground guard trace electrically coupled to the one or more ground signal paths and positioned adjacent to a first side of the radar clock signal line and parallel to a length of the radar clock signal line.

Abstract: Disclosed are three-dimensional (3D) memory devices and fabricating methods thereof. In some embodiments, a disclosed memory device comprises a wafer structure having a sealing region and a chip region. The wafer structure comprises a substrate, a memory string array on a first side of the substrate in the chip region, a first protection structure and a second protection structure on the first side of the substrate in the sealing region, and a first contact and a second contact extending through the substrate in the sealing region. The first contact is in contact with the first protection structure, and the second contact is in contact with the second protection structure.