Patents by Inventor Zhen-Dong Guo

Zhen-Dong Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory interface to bridge memory buses
    Patent number: 7558124
    Abstract: A memory interface to bridge a parallel memory bus and a serial memory bus. A printed circuit board includes at least one memory interface buffer chip to connect a memory controller of core logic and an advanced memory buffer (AMB). The memory controller has a memory interface for a parallel memory bus.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: July 7, 2009
    Assignee: Montage Technology Group, Ltd
    Inventors: Larry Wu, Gang Shan, Stephen Tai, Howard Yang, Zhen-Dong Guo
  • High speed transceiver with low power consumption
    Patent number: 7368950
    Abstract: High-speed and low-power consumption CMOS receivers using adaptively-regulated power supply and pseudo differential digital logic to: 1) reduce the power consumption of the transceiver; and, 2) increase the power supply rejection (PSR) during processing the data.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: May 6, 2008
    Assignee: Montage Technology Group Limited
    Inventors: Larry Wu, Howard Yang, Zhen-Dong Guo
  • HIGH SPEED TRANSCEIVER WITH LOW POWER CONSUMPTION
    Publication number: 20080024168
    Abstract: High-speed and low-power consumption CMOS receivers using adaptively-regulated power supply and pseudo differential digital logic to: 1) reduce the power consumption of the transceiver; and, 2) increase the power supply rejection (PSR) during processing the data.
    Type: Application
    Filed: September 20, 2007
    Publication date: January 31, 2008
    Applicant: MONTAGE TECHNOLOGY GROUP, LTD
    Inventors: Larry Wu, Howard Yang, Zhen-Dong Guo
  • MEMORY INTERFACE TO BRIDGE MEMORY BUSES
    Publication number: 20070121389
    Abstract: A memory interface to bridge a parallel memory bus and a serial memory bus. One embodiment includes a printed circuit board, comprising: at least one memory interface buffer chip to connect a memory controller of core logic and an advanced memory buffer (AMB). The memory controller has a memory interface for a parallel memory bus.
    Type: Application
    Filed: March 28, 2006
    Publication date: May 31, 2007
    Applicant: Montage Technology Group, LTD
    Inventors: Larry Wu, Howard Yang, Zhen-Dong Guo, Gang Shan, Stephen Tai
  • High speed transceiver with low power consumption
    Publication number: 20070109019
    Abstract: High-speed and low-power consumption CMOS receivers using adaptively-regulated power supply and pseudo differential digital logic to: 1) reduce the power consumption of the transceiver; and, 2) increase the power supply rejection (PSR) during processing the data.
    Type: Application
    Filed: November 16, 2005
    Publication date: May 17, 2007
    Inventors: Larry Wu, Howard Yang, Zhen-Dong Guo