Patents by Inventor Zheng Wu

Zheng Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250150061
    Abstract: Disclosed is an electronic device including a substrate, a radio frequency (RF) modulation element, a control circuit and a radio frequency (RF) choke. The RF modulation element, the control circuit and the RF choke are disposed on the substrate. The RF choke is electrically coupled between the RF modulation element and the control circuit. The orthographic projections of the RF modulation element, the control circuits and the RF choke on the substrate do not overlap each other.
    Type: Application
    Filed: October 1, 2024
    Publication date: May 8, 2025
    Applicant: Innolux Corporation
    Inventor: Yan-Zheng Wu
  • Publication number: 20250125178
    Abstract: Disclosed is a method of transferring a target object to a target substrate including the following steps; first, defining a plurality of units recurring on the target substrate, wherein one of the plurality of units is made up of a plurality of target locations on the target substrate; next, disposing the plurality of target objects on a unit transfer stamp, wherein the plurality of target objects on the unit transfer stamp correspond to the plurality of target locations; afterwards, transferring the plurality of target objects to the target substrate using the unit transfer stamp; then, transferring at least one target object to the remaining target locations on the target substrate.
    Type: Application
    Filed: September 10, 2024
    Publication date: April 17, 2025
    Applicant: Innolux Corporation
    Inventors: Chen-Lin Yeh, Yan-Zheng Wu
  • Publication number: 20250118895
    Abstract: An electronic device includes a board, a chip, a first conductive element and a second conductive element. The board has a first surface and a second surface opposite to the first surface. The board has a first through hole penetrating from the first surface to the second surface. The first conductive element is disposed between the board and the chip. The second conductive element has a first portion and a second portion connected to the first portion. The first conductive element is disposed between the first portion of the second conductive element and the board and overlaps with the first portion of the second conductive element. In a cross-sectional view of the electronic device, the second portion of the second conductive element directly contacts a side surface of the first conductive element and extends into the first through of the board.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Applicant: Innolux Corporation
    Inventors: Ying-Jen Chen, Chih-Yung Hsieh, Yan-Zheng Wu
  • Publication number: 20250095214
    Abstract: An encoding device includes: memory; and a circuit. In operation, the circuit: when a first triangle satisfies a condition, performs a first process including a process of using the first triangle to derive a predicted value of a current vertex to be encoded of a second triangle; when the first triangle does not satisfy the condition, performs a second process including a process of using a third triangle different from the first triangle and the second triangle to derive the predicted value of the current vertex; and encodes the current vertex using the predicted value.
    Type: Application
    Filed: December 2, 2024
    Publication date: March 20, 2025
    Inventors: Toshiyasu SUGIO, Noritaka IGUCHI, Takahiro NISHI, Chong Soon LIM, Zheng WU, Han Boon TEO, Keng Liang LOI, Chung Dean HAN, Georges NADER, Farman DUMANOV
  • Publication number: 20250093515
    Abstract: A three-dimensional point cloud generation method for generating a three-dimensional point cloud including one or more three-dimensional points includes: obtaining (i) a two-dimensional image obtained by imaging a three-dimensional object using a camera and (ii) a first three-dimensional point cloud obtained by sensing the three-dimensional object using a distance sensor; detecting, from the two-dimensional image, one or more attribute values of the two-dimensional image that are associated with a position in the two-dimensional image; and generating a second three-dimensional point cloud including one or more second three-dimensional points each having an attribute value, by performing, for each of the one or more attribute values detected, (i) identifying, from a plurality of three-dimensional points forming the first three-dimensional point cloud, one or more first three-dimensional points to which the position of the attribute value corresponds, and (ii) appending the attribute value to the one or more fi
    Type: Application
    Filed: December 5, 2024
    Publication date: March 20, 2025
    Inventors: Pongsak LASANG, Chi WANG, Zheng WU, Sheng Mei SHEN, Toshiyasu SUGIO, Tatsuya KOYAMA
  • Patent number: 12237312
    Abstract: A light-emitting diode (LED) packaging module includes a plurality of LED chips spaced apart from one another, an encapsulating layer that fills in a space among the LED chips, a light-transmitting layer disposed on the encapsulating layer, a wiring assembly disposed on and electrically connected to the LED chips, and an insulation component that covers the encapsulating layer and the wiring assembly. Each of the LED chips includes an electrode assembly including first and second electrodes. The light-transmitting layer includes a light-transmitting layer that has a light transmittance greater than that of the encapsulating layer.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: February 25, 2025
    Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Shuning Xin, Chen-Ke Hsu, Aihua Cao, Junpeng Shi, Weng-Tack Wong, Yanqiu Liao, Zhen-Duan Lin, Changchin Yu, Chi-Wei Liao, Zheng Wu, Chia-En Lee
  • Patent number: 12230612
    Abstract: A light-emitting diode (LED) packaging module includes light-emitting units arranged in an array having m row(s) and n column(s), an encapsulating layer, and a wiring assembly, where m and n each independently represents a positive integer. Each of the light-emitting units includes LED chips each including a chip first surface, a chip second surface, a chip side surface, and an electrode assembly disposed on the chip second surface. The encapsulating layer covers the chip side surface and fills a space among the LED chips. The wiring assembly is disposed on the chip second surface and is electrically connected to the electrode assembly.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: February 18, 2025
    Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Shuning Xin, Zhen-Duan Lin, Yanqiu Liao, Junpeng Shi, Aihua Cao, Changchin Yu, Chen-Ke Hsu, Chi-Wei Liao, Chia-En Lee, Zheng Wu
  • Patent number: 12230611
    Abstract: A light-emitting device includes a number (N) of light-emitting units, a number (a) of first metal pads and a number (b) of second metal pads. Each of the light-emitting units includes a number (n) of light-emitting chips each having two distinct terminals, where N and n are integers and N>1, n>?3. The numbers (a) and (b) are integers and a>1, b>1, and the terminals of each of the light-emitting chips are electrically connected to a unique combination of one of the number (a) of first metal pads and a number (b) of second metal pads, respectively. The numbers (N), (n), (a) and (b) satisfy the equation: a*b=n*N.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: February 18, 2025
    Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Yanqiu Liao, Junpeng Shi, Shuning Xin, Chen-ke Hsu, Zhen-duan Lin, Changchin Yu, Aihua Cao, Chi-Wei Liao, Zheng Wu, Chia-en Lee
  • Publication number: 20250040297
    Abstract: A micro light-emitting diode and a preparation method therefor, a micro light-emitting element and a display. The micro light-emitting diode comprises an epitaxial layer and a dielectric layer, wherein the epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are arranged in sequence, and has a first surface and a second surface which are arranged opposite each other, the first semiconductor layer being located on the side of the epitaxial layer close to the first surface; the epitaxial layer is configured with a mesa, and the mesa is exposed from the first semiconductor layer and faces the second surface; and the dielectric layer covers the first surface and at least part of a side wall of the epitaxial layer, and the height H1 of the dielectric layer on the side wall of the epitaxial layer is less than the height of the mesa.
    Type: Application
    Filed: November 21, 2022
    Publication date: January 30, 2025
    Applicant: Quanzhou sanan semiconductor technology Co., Ltd.
    Inventors: Zheng WU, Chia-En LEE
  • Patent number: 12212075
    Abstract: The disclosure provides an electronic device. The electronic device includes a plurality of units. Each of the units includes an integrated substrate. The integrated substrate includes a first dielectric layer, a first conductive layer, a second dielectric layer, and a second conductive layer. The first dielectric layer has a first side and a second side opposite to the first side. The first conductive layer is disposed on the first side. The second dielectric layer has a third side facing the second side and a fourth side opposite to the third side. The second conductive layer is disposed on the fourth side. A loss tangent of at least one of the first dielectric layer and the second dielectric layer is less than or equal to 0.1 and greater than 0. The electronic device of an embodiment of the disclosure may improve product yield.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: January 28, 2025
    Assignee: Innolux Corporation
    Inventors: Ying-Jen Chen, Chih-Yung Hsieh, Yan-Zheng Wu
  • Publication number: 20250028378
    Abstract: Technologies directed to input current limiter (ICL) circuits with frequency control loops are described. One integrated circuit includes a processing core and an ICL circuit. The ICL circuit can limit an input current to the processing core within a current limit of the processing core. The ICL circuit can determine an input current and a supply voltage provided to the processing core at a first time. The ICL circuit can reduce a clock of the processing core from a first clock frequency to a second clock frequency with a linear frequency drop based on the current limit, the input current, and the supply voltage. value, the second value, and the third value. The first clock frequency corresponds to a first voltage, and the second frequency corresponds to a second voltage. The ICL circuit can reduce the clock to a third clock frequency corresponding to a third voltage.
    Type: Application
    Filed: July 17, 2023
    Publication date: January 23, 2025
    Inventors: Ziyi Xu, Zheng Wu, Ben Pei En Tsai, Xuan Wang
  • Publication number: 20250021118
    Abstract: Technologies directed to control circuits to adjust input current settings of input current limiter (ICL) circuits are described. One integrated circuit includes a processing core, an ICL circuit, and a control circuit. The ICL circuit has a first input current setting to limit an input current signal provided to the processing core to a current limit. The control circuit can receive digital samples from the ICL circuit with the first input current setting in response to one or more transient response tests. Using the digital samples, the control circuit can determine a response characteristic of a transient response of the input current signal. The control circuit can adjust the first input current setting to a second input current setting until the response characteristic satisfies a condition.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 16, 2025
    Inventors: Ziyi Xu, Zheng Wu, Ben Pei En Tsai
  • Patent number: 12189037
    Abstract: A three-dimensional point cloud generation method for generating a three-dimensional point cloud including one or more three-dimensional points includes: obtaining (i) a two-dimensional image obtained by imaging a three-dimensional object using a camera and (ii) a first three-dimensional point cloud obtained by sensing the three-dimensional object using a distance sensor; detecting, from the two-dimensional image, one or more attribute values of the two-dimensional image that are associated with a position in the two-dimensional image; and generating a second three-dimensional point cloud including one or more second three-dimensional points each having an attribute value, by performing, for each of the one or more attribute values detected, (i) identifying, from a plurality of three-dimensional points forming the first three-dimensional point cloud, one or more first three-dimensional points to which the position of the attribute value corresponds, and (ii) appending the attribute value to the one or more fi
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: January 7, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Pongsak Lasang, Chi Wang, Zheng Wu, Sheng Mei Shen, Toshiyasu Sugio, Tatsuya Koyama
  • Publication number: 20240429207
    Abstract: An electronic device includes a carrier, a first electronic element, and a first connecting element. The carrier has a first bonding pad, a first conductive layer, a second conductive layer and an insulating layer with a via. The first conductive layer is disposed between the first bonding pad and the insulating layer, and electrically connected to the second conductive layer through the via. The first electronic element is disposed on the carrier and has a substrate. The first connecting element is disposed between the top surface of the first bonding pad and the first electronic element and electrically connected to the first bonding pad and the first electronic element. The substrate has a through hole which is overlapped with the first bonding pad and the first connecting element. A minimum distance between the through hole and the via is greater than zero.
    Type: Application
    Filed: September 6, 2024
    Publication date: December 26, 2024
    Inventors: Jen-Hai CHI, Chia-Ping TSENG, Chen-Lin YEH, Yan-Zheng WU
  • Publication number: 20240405185
    Abstract: A LED packaging module includes a plurality of LED chips, a wiring layer, and an encapsulant component. The LED chips are spaced apart, each of which includes chip first, chip second, and chip side surfaces, and an electrode unit. The wiring layer is disposed on the chip second surfaces, has first, second, and side wiring layer surfaces, and is divided into a plurality of wiring parts spaced apart. The first wiring layer surface contacts and is electrically connected to the electrode units. The encapsulant component includes first and second encapsulating layers, covers the chip side surfaces, the chip first surfaces, and the side wiring layer surface, and fills gaps among the wiring parts. Each LED chip has a thickness represented by TA, the first encapsulating layer has a thickness represented by TB, and TA and TB satisfy a relationship: TB/TA?1.
    Type: Application
    Filed: August 15, 2024
    Publication date: December 5, 2024
    Inventors: Zhen-duan LIN, Yanqiu LIAO, Shuning XIN, Weng-Tack WONG, Junpeng SHI, Aihua CAO, Changchin YU, Chi-Wei LIAO, Chen-ke HSU, Zheng WU, Chia-en LEE
  • Publication number: 20240396495
    Abstract: A photovoltaic junction box includes a first capacitor, a first conversion circuit, a second conversion circuit, a control unit, an input end, and an output end. The first capacitor is electrically connected to the input end. The first capacitor is configured to filter the alternating current part in a direct current input from an external device. The control unit is separately electrically connected to the first capacitor and the output end and configured to determine the maximum output power point of the external device. The first conversion circuit and the second conversion circuit are connected in parallel and are electrically connected to the control unit. The first conversion circuit and the second conversion circuit are configured to eliminate a ripple current.
    Type: Application
    Filed: August 17, 2023
    Publication date: November 28, 2024
    Applicant: Slenergy Technology (A.H.) Co., Ltd.
    Inventors: Yuesheng LIU, Jian ZHANG, Jinhao HOU, Zheng WU
  • Publication number: 20240357171
    Abstract: A three-dimensional data decoding method includes: obtaining a bitstream including encoded three-dimensional points generated by encoding three-dimensional points each of which is represented by a first angle, a second angle, and a distance; determining a reference three-dimensional point among the three-dimensional points; and performing, according to the first angle of the reference three-dimensional point, at least one of arithmetic decoding or debinarizing on encoded information of a current encoded three-dimensional point included in the encoded three-dimensional points to generate information of a current three-dimensional point included in the three-dimensional points, the information excluding the first angle.
    Type: Application
    Filed: July 3, 2024
    Publication date: October 24, 2024
    Inventors: Toshiyasu SUGIO, Noritaka IGUCHI, Takahiro NISHI, Zheng WU, Keng Liang LOI, Chung Dean HAN
  • Publication number: 20240356234
    Abstract: Disclosed is a reconfigurable surface configured to modulate a phase of an electromagnetic wave. The reconfigurable surface includes a first substrate, a plurality of modulating units, and a ground signal layer. The plurality of modulating units are disposed on the first substrate. One of the plurality of modulating units includes a first electrode, a second electrode, and a modulating medium. The first electrode is disposed on the first substrate. The second electrode is disposed adjacent to the first electrode. The modulating medium is located between the first electrode and the second electrode. The ground signal layer is disposed under the first substrate. A manufacturing method of a reconfigurable surface is also provided.
    Type: Application
    Filed: March 12, 2024
    Publication date: October 24, 2024
    Applicant: Innolux Corporation
    Inventors: Yan-Zheng Wu, Yung-Wei Chen, Chen-Lin Yeh
  • Patent number: 12125829
    Abstract: An electronic device includes a carrier, a plurality of electronic elements and a connecting terminal. The carrier has at least one bonding pad. The electronic elements are disposed on the carrier, and each of the electronic elements includes a substrate. A distance between two adjacent substrates of the electronic elements is not less than 300 ?m. The connecting terminal is disposed between one of the substrate and the carrier. One of the electronic elements are electrically connected to the at least one bonding pad via the connecting terminal.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: October 22, 2024
    Assignee: InnoLux Corporation
    Inventors: Jen-Hai Chi, Chia-Ping Tseng, Chen-Lin Yeh, Yan-Zheng Wu
  • Patent number: 12106995
    Abstract: A method for transferring a micro semiconductor element includes the following steps. A substrate, a bonding layer disposed on the substrate, and a supporting member disposed on the bonding layer opposite to the substrate are provided. The supporting member is bonded to a micro semiconductor element for supporting the same. A through hole is provided to extend through the substrate, the bonding layer, and the supporting member so as to forma transfer structure. A separation force is applied via the through hole to separate the micro semiconductor element from the supporting member.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: October 1, 2024
    Assignee: QUANZHOU SAN'AN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Zheng Wu, Shao-Ying Ting, Chia-En Lee, Chen-Ke Hsu