Abstract: A semiconductor device includes a plurality of memory blocks. Each memory block includes a memory deck including interleaved first conductor layers and first dielectric layers, and a separation structure extending to separate two adjacent memory blocks. Each separation structure includes a dielectric stack including interleaved third dielectric layers and fourth dielectric layers. The third dielectric layers are in contact with the first dielectric layers, and the fourth dielectric layers are in contact with the first conductor layers.

Abstract: A three-dimensional (3D) memory device includes a memory stack over a substrate. The memory stack includes interleaved a plurality of conductor layers and a plurality of insulating layers. The 3D memory device also includes a plurality of channel structures extending vertically in the memory stack. The 3D memory device further includes a source structure extending in the memory stack. The source structure includes a support structure dividing the source structure into first and second sections. The source structure also includes an adhesion layer. At least a portion of the adhesion layer extends through the support structure and conductively connects the first and second sections.

Abstract: A three-dimensional (3D) memory device includes a memory stack over a substrate. The memory stack includes interleaved a plurality of conductor layers and a plurality of insulating layers. The 3D memory device also includes a plurality of channel structures extending vertically in the memory stack. The 3D memory device further includes a source structure extending in the memory stack. The source structure includes a support structure dividing the source structure into first and second sections. The source structure also includes an adhesion layer. At least a portion of the adhesion layer extends through the support structure and conductively connects the first and second sections.