Patents by Inventor Zhengnan DING

Zhengnan DING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12119069
    Abstract: In an anti-fuse memory reading circuit with controllable reading time, a reading time control circuit generates a control signal corresponding to reading time. Based on a clock signal, a programmable reading pulse generation circuit generates a reading pulse with a pulse width corresponding to the control signal. Based on the reading pulse and the control signal, the reading amplification circuit selects a pull-up current source corresponding to the reading time, pulls up a voltage on a bit line (BL) of an anti-fuse memory cell, reads data stored in the anti-fuse memory cell starting from a rising edge of the reading pulse, and latches the read data at a falling edge of the reading pulse. The anti-fuse memory reading circuit can generate a reading pulse with a corresponding pulse width and a pull-up current source with a corresponding size based on the required reading time.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: October 15, 2024
    Assignee: WUXI ESIONTECH CO., LTD.
    Inventors: Zhengzhou Cao, Jie Zhu, Yanfei Zhang, Jing Sun, Zhenkai Ji, Zhengnan Ding
  • Publication number: 20230025219
    Abstract: In an anti-fuse memory reading circuit with controllable reading time, a reading time control circuit generates a control signal corresponding to reading time. Based on a clock signal, a programmable reading pulse generation circuit generates a reading pulse with a pulse width corresponding to the control signal. Based on the reading pulse and the control signal, the reading amplification circuit selects a pull-up current source corresponding to the reading time, pulls up a voltage on a bit line (BL) of an anti-fuse memory cell, reads data stored in the anti-fuse memory cell starting from a rising edge of the reading pulse, and latches the read data at a falling edge of the reading pulse. The anti-fuse memory reading circuit can generate a reading pulse with a corresponding pulse width and a pull-up current source with a corresponding size based on the required reading time.
    Type: Application
    Filed: September 29, 2022
    Publication date: January 26, 2023
    Applicant: WUXI ESIONTECH CO., LTD.
    Inventors: Zhengzhou CAO, Jie ZHU, Yanfei ZHANG, Jing SUN, Zhenkai JI, Zhengnan DING