Abstract: An input common-mode compensation circuit includes an energy storage module, a switching selection module, and a feedback compensation module. An end of the energy storage module is connected to an input end of the residual amplifier. An input end of the switching selection module is connected to another end of the energy storage module. Input ends of the feedback compensation module are respectively connected to the end of the energy storage module and to a reset voltage of the residual amplifier, and an output end of the feedback compensation module is connected to an output end of the switching selection module. During the reset stage of a residual amplifier, the energy storage module is charged under the action of a reset voltage. During the working stage of the residual amplifier, feedback compensation is performed on the energy storage module through the feedback compensation module.

Abstract: The disclosure features methods of treating RAS disorders using Compound A, or a pharmaceutically acceptable salt thereof. The disclosure also features methods of treating RAS disorders (e.g., cancer) including combinations of Compound A, or a pharmaceutically acceptable salt thereof, and additional therapeutic agent.

Abstract: Disclosed herein are high throughput, efficient, and simplified unloading and packaging systems and methods for large-scale production of pharmaceutical units using additive manufacturing. The disclosed systems and methods may unload, inspect, package, and trace pharmaceutical units, produced by an additive manufacturing system, that are not damaged or deformed. The unloading and packaging system can include one or more unloading and packaging devices. The unloading and packaging device can include a modular configuration having modules. Individual modules to be arranged in any relative order, at any location, and with any number in the unloading and packaging device. The flexibility of the modular configuration allows one or more modules to be removed or added at any given time due to, e.g., expansion, downsizing, module repair, module upgrades, etc. High throughput can be achieved by operating unloading and packaging devices independently and in parallel.

Abstract: The disclosure features methods of treating RAS disorders using safe and effective doses of Compound A, or a pharmaceutically acceptable salt thereof. The disclosure also features methods of treating RAS disorders including combination therapies comprising Compound A, or a pharmaceutically acceptable salt thereof, and additional therapeutic agent.

Abstract: An all-in-one wafer cleaning machine for monocrystalline silicon production includes: a circulation track disposed at a rear end of a cleaning equipment main body and fixed to the cleaning equipment main body; a horizontal moving device disposed at an outer side of the circulation track; a first motor fixedly installed at one end inside the horizontal moving device; a first transmission gear disposed at an output end of the first motor; a first fixed rod fixedly disposed at the other end of the horizontal moving device; a first fixed gear disposed at one end of the first fixed rod, wherein the first transmission gear and the first fixed gear are engaged with the circulating track; and a vertical track fixedly disposed at the horizontal moving device.

Abstract: A high throughput, efficient, and simplified unloading and packaging systems and methods for large-scale production of pharmaceutical units (104) using additive manufacturing. The systems and methods may unload, inspect, package, and trace pharmaceutical units, produced by an additive manufacturing system (900), that are not damaged or deformed. The unloading and packaging system can include one or more unloading and packaging devices (100). The unloading and packaging device can include a modular configuration having modules. Individual modules to be arranged in any relative order, at any location, and with any number in the unloading and packaging device. The flexibility of the modular configuration allows one or more modules to be removed or added at any given time due to, e.g., expansion, downsizing, module repair, module upgrades, etc. High throughput can be achieved by operating unloading and packaging devices independently.

Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of a physical structure by a central processing unit (CPU), generating a batch of particles, simulating a flight path of one of the particles with a ray-tracing method by a parallel processing thread in a graphics processing unit (GPU), identifying a surface normal of a voxel unit in the voxel mesh that intersects the flight path by the parallel processing thread in the GPU, passing parameters describing the one of the particles hitting the voxel mesh from the GPU to the CPU, determining a surface reaction between the one of the particles and the voxel unit by the CPU, and updating the voxel mesh based on the determining of the surface reaction.

Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of the physical structure, generating a batch of particles, simulating a flight path of one of the particles with a ray-tracing method by a parallel processing thread in a hardware accelerator, identifying a surface normal of a voxel unit in the voxel mesh that intersects the flight path by the parallel processing thread, determining a surface reaction between the one of the particles and the voxel unit by a central processing unit (CPU), and updating the voxel mesh based on the determining of the surface reaction.

Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of the physical structure, generating a batch of particles, simulating a flight path of at least one of the particles with a ray-tracing method, identifying a voxel unit in the voxel mesh that intersects the flight path, determining a surface reaction between the one of the particles and the voxel unit, and adding an extra voxel unit adjacent to the voxel unit based on the determining of the surface reaction.

Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of the physical structure, generating a batch of particles, simulating a flight path of one of the particles with a ray-tracing method by a parallel processing thread in a hardware accelerator, identifying a surface normal of a voxel unit in the voxel mesh that intersects the flight path by the parallel processing thread, determining a surface reaction between the one of the particles and the voxel unit by a central processing unit (CPU), and updating the voxel mesh based on the determining of the surface reaction.

Abstract: An exemplary method for semiconductor device simulation includes receiving a device structure, generating a mesh for the device structure, simulating electrical behavior of the device structure using the mesh, and adaptively adjusting the mesh during the simulating. The adaptively adjusting the mesh includes performing a multi-level restriction-prolongation (MLRP) process that decreases and increases a resolution of the mesh. The semiconductor device simulation can be performed by a semiconductor simulation system that includes a central processing unit, a memory, and a hardware accelerator. The MLRP process is at least partially parallelized on the hardware accelerator, such as a GPU.

Abstract: A high throughput, efficient, and simplified unloading and packaging systems and methods for large-scale production of pharmaceutical units (104) using additive manufacturing. The systems and methods may unload, inspect, package, and trace pharmaceutical units, produced by an additive manufacturing system (900), that are not damaged or deformed. The unloading and packaging system can include one or more unloading and packaging devices (100). The unloading and packaging device can include a modular configuration having modules. Individual modules to be arranged in any relative order, at any location, and with any number in the unloading and packaging device. The flexibility of the modular configuration allows one or more modules to be removed or added at any given time due to, e.g., expansion, downsizing, module repair, module upgrades, etc. High throughput can be achieved by operating unloading and packaging devices independently.

Abstract: A method of manufacturing a p-type MOSFET includes depositing a channel material to form a channel region, forming a source region and a drain region on each side of the channel region along a first direction, depositing a gate oxide layer on the channel region along a second direction crossing the first direction, and depositing a gate electrode on the gate oxide. The channel material includes a group IV element or III-V semiconductor compound and have a diamond or zincblende cubic crystal structure. A <001> direction of the crystal structure is parallel to the second direction. Two adjacent atoms on an out-most atomic layer of the channel region along the first direction are connected to each other via a single intervening atom, and an interface between the gate oxide layer and the channel region has a surface roughness of 1 angstrom or lower.

Abstract: A method of manufacturing a p-type MOSFET includes depositing a channel material to form a channel region, forming a source region and a drain region on each side of the channel region along a first direction, depositing a gate oxide layer on the channel region along a second direction crossing the first direction, and depositing a gate electrode on the gate oxide. The channel material includes a group IV element or III-V semiconductor compound and have a diamond or zincblende cubic crystal structure. A <001> direction of the crystal structure is parallel to the second direction. Two adjacent atoms on an out-most atomic layer of the channel region along the first direction are connected to each other via a single intervening atom, and an interface between the gate oxide layer and the channel region has a surface roughness of 1 angstrom or lower.

Abstract: A method of circuit yield analysis for evaluating rare failure events includes performing initial sampling to detect failed samples respectively located at one or more failure regions in a multi-dimensional parametric space, generating a distribution of failed samples at discrete values along each dimension, identifying the failed samples, performing a transform to project the failed samples into all dimensions in a transform space, and classifying a type of failure region for each dimension in the parametric space.

Abstract: According to one embodiment of the present invention a circuit simulator configured to simulate a degraded output of a circuit including a plurality of transistors includes: a behavioral recurrent neural network configured to receive an input waveform and to compute a circuit output waveform; a feature engine configured to model one or more degraded circuit elements in accordance with an aging time, to receive the circuit output waveform and to output a plurality of degraded features; and a physics recurrent neural network configured to receive the plurality of degraded features from the feature engine and to simulate the degraded output of the circuit.

Abstract: According to one embodiment of the present invention a circuit simulator configured to simulate a degraded output of a circuit including a plurality of transistors includes: a behavioral recurrent neural network configured to receive an input waveform and to compute a circuit output waveform; a feature engine configured to model one or more degraded circuit elements in accordance with an aging time, to receive the circuit output waveform and to output a plurality of degraded features; and a physics recurrent neural network configured to receive the plurality of degraded features from the feature engine and to simulate the degraded output of the circuit.

Abstract: A method of circuit yield analysis for evaluating rare failure events includes performing initial sampling to detect failed samples respectively located at one or more failure regions in a multi-dimensional parametric space, generating a distribution of failed samples at discrete values along each dimension, identifying the failed samples, performing a transform to project the failed samples into all dimensions in a transform space, and classifying a type of failure region for each dimension in the parametric space.