Abstract: One example discloses a first wireless device, including: a band-steering device including a band-detection element and a band-steering element; wherein the band-detection element is configured to receive a first signal from a second wireless device and detect from the first signal if the second device has multi-band capability; and wherein the band-steering element is configured to respond to the first signal by transmitting a second signal to the second device in a preferred band.

Abstract: One example discloses a first wireless device, including: a band-steering device including a band-detection element and a band-steering element; wherein the band-detection element is configured to receive a first signal from a second wireless device and detect from the first signal if the second device has multi-band capability; and wherein the band-steering element is configured to respond to the first signal by transmitting a second signal to the second device in a preferred band.

Abstract: Wireless networking transceiver circuitry for an integrated circuit device includes a plurality of wireless networking transceiver subsystems, each subsystem including respective processing circuitry configurable for coupling to radio circuitry to implement a respective set of protocol features selected from at least one overall set of protocol features. Memory circuitry is provided, sufficient to support a respective set of protocol features in each subsystem when at least one respective set of protocol features is smaller than the overall set of protocol features. Memory-sharing circuitry is provided, configurable to couple respective portions of the memory circuitry to the processing circuitry of respective subsystems. The memory circuitry and the memory-sharing circuitry may be outside the subsystems, or distributed within the subsystems. The memory may be 60% of an amount of memory sufficient to support the overall set of protocol features in all subsystems.

Abstract: The present disclosure describes methods and apparatuses for implementing virtual dynamic library loading in embedded systems. In some aspects, a determination is made that a feature is not available in firmware executed from a first memory. Based on information associated with the feature, a portion of a second memory is allocated for code of the feature. In some cases, the portion of the second memory is allocated from a data buffer or part of a shared memory. The code of the feature is loaded to the allocated portion of the second memory and address aliasing logic is configured enable execution of the feature from the second memory. By allocating and executing firmware features from the second memory, a size of the firmware executed from the first memory can be reduced to conserve memory space and other firmware features may be dynamically loaded and executed from the second memory.