Patents by Inventor Zhengtian FENG
Zhengtian FENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12159060Abstract: The present disclosure relates to a data writing method and apparatus of a NAND flash, and a storage medium. The method includes: for each channel in the NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs; and for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair. Therefore, the transmission efficiency of a NAND bus can be improved, and the data writing performance of the NAND flash can be improved.Type: GrantFiled: June 2, 2022Date of Patent: December 3, 2024Assignee: INNOGRIT TECHNOLOGIES CO., LTD.Inventors: Tao Wei, Zhengtian Feng, Ke Wei
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Publication number: 20240118816Abstract: This application relates to the field of storage technology and discloses a method for protecting partial space of SSD and a storage system. The storage space of the SSD is divided into multiple regions and there is a partition table stored in the SSD, which includes region type of each region. The method includes: receiving, by the SSD, a command to read the partition table; and retrieving, by the SSD, the partition table, removing one or more regions with the region type being locked from the partition table, and returning the removed partition table. This application provides a simple implementation and self-encrypting protection scheme, which requires fewer running resources, is easy to operate, has strong portability, and can meet basic self-encrypting and locking requirements.Type: ApplicationFiled: October 10, 2023Publication date: April 11, 2024Inventors: Yang HUANG, Zhetian ZHU, Qian CHENG, Zhengtian FENG, Longtao GAO
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Publication number: 20230297282Abstract: The present disclosure relates to a data writing method and apparatus of a NAND flash, and a storage medium. The method includes: for each channel in the NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs; and for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair. Therefore, the transmission efficiency of a NAND bus can be improved, and the data writing performance of the NAND flash can be improved.Type: ApplicationFiled: June 2, 2022Publication date: September 21, 2023Inventors: Tao WEI, Zhengtian FENG, Ke WEI
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Patent number: 11500721Abstract: A reading method for solid-state disk returns data and/or information depending on state information. A data unit stored in the solid-state disk comprises metadata and a plurality of sectors including at least two sectors of user data, the metadata comprising a sector state set indicating state information of each of the sectors in the data unit, and the state information comprising a valid state and an invalid state. In response to receiving a read command from a host to read at least one of the sectors in the data unit, the solid-state disk returns actual data to the host for one or more of the sectors in the valid state, and returns information indicating a read error to the host for one or more of the sectors in the invalid state, according to the sector state set stored in the metadata of the data unit.Type: GrantFiled: November 25, 2020Date of Patent: November 15, 2022Assignee: INNOGRIT TECHNOLOGIES CO., LTD.Inventors: Zhengtian Feng, Jie Chen, Ke Wei, Jing Gao, Tao Wei
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Publication number: 20220294624Abstract: The present disclosure relates to an encryption method and device, an electronic apparatus, and a storage medium. The method comprises: determining whether at least one storage apparatus connected to the terminal apparatus includes a target storage apparatus with an encryption function; acquiring, if the storage apparatus includes the target storage apparatus, encryption information of the target storage apparatus; and generating, if the encryption status is unencrypted, a password setting instruction in response to setting a password, and sending the password setting instruction to the target storage apparatus. According to the encryption method of the embodiment of the present disclosure, the terminal apparatus can be used to determine the encryption information of the storage apparatus, and to set a password, so that the storage apparatus encrypts the data stored in its private partition based on the password.Type: ApplicationFiled: June 18, 2021Publication date: September 15, 2022Inventors: Hui LI, Chuan KE, Zhengtian FENG
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Patent number: 11385698Abstract: Apparatus and methods are provided for managing voltage drops on a semiconductor chip. One exemplary embodiment according to the present disclosure may provide a method for managing voltage drops in a semiconductor chip. The method may comprise monitoring power supply voltages for different voltage domains in the semiconductor chip by a voltage drop detection circuit, determining that a voltage drop event has occurred based on voltage information and duration information associated with the voltage drop event reported from the voltage drop detection circuit, generating diagnostic information that includes whether the voltage drop event is an external event or an internal event determined based on the voltage information and timing information reported from the voltage drop detection circuit, and taking an action based on the diagnosis information.Type: GrantFiled: December 30, 2020Date of Patent: July 12, 2022Assignee: INNOGRIT TECHNOLOGIES CO., LTD.Inventors: Gang Zhao, Lin Chen, Zhengtian Feng, Qun Zhao
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Publication number: 20220206553Abstract: Apparatus and methods are provided for managing voltage drops on a semiconductor chip. One exemplary embodiment according to the present disclosure may provide a method for managing voltage drops in a semiconductor chip. The method may comprise monitoring power supply voltages for different voltage domains in the semiconductor chip by a voltage drop detection circuit, determining that a voltage drop event has occurred based on voltage information and duration information associated with the voltage drop event reported from the voltage drop detection circuit, generating diagnostic information that includes whether the voltage drop event is an external event or an internal event determined based on the voltage information and timing information reported from the voltage drop detection circuit, and taking an action based on the diagnosis information.Type: ApplicationFiled: December 30, 2020Publication date: June 30, 2022Inventors: Gang Zhao, Lin Chen, Zhengtian Feng, Qun Zhao
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Publication number: 20220156142Abstract: A reading method for solid-state disk returns data and/or information depending on state information. A data unit stored in the solid-state disk comprises metadata and a plurality of sectors including at least two sectors of user data, the metadata comprising a sector state set indicating state information of each of the sectors in the data unit, and the state information comprising a valid state and an invalid state. In response to receiving a read command from a host to read at least one of the sectors in the data unit, the solid-state disk returns actual data to the host for one or more of the sectors in the valid state, and returns information indicating a read error to the host for one or more of the sectors in the invalid state, according to the sector state set stored in the metadata of the data unit.Type: ApplicationFiled: November 25, 2020Publication date: May 19, 2022Inventors: Zhengtian Feng, Jie Chen, Ke Wei, Jing Gao, Tao Wei
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Patent number: 11335414Abstract: A method and apparatus for determining a reference voltage id disclosed. The method may include: reading data from a first flash memory page by using different reference voltages, and taking, as a first target reference voltage, one of the different reference voltages at which the first number of erroneous bits of the data that is read reaches a converegence value. The first flash memory page is any one of multiple flash memory pages of a flash memory block to be tested. The method may include adjusting the first target reference voltage to obtain second target reference voltages; and reading data from the flash memory pages by using the second target referece voltages, and taking, as a target reference voltage, one of the second target reference voltages at which the second number of erroneous bits of the data that is read is the smallest.Type: GrantFiled: April 24, 2020Date of Patent: May 17, 2022Assignee: INNOGRIT TECHNOLOGIES CO., LTD.Inventors: Tao Wei, Zhengtian Feng, Ke Wei
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Publication number: 20210020251Abstract: The present disclosure relates to a method and apparatus for determining a reference voltage. The method may comprise: reading data from a first flash memory page by using a plurality of different reference voltages, and taking, as a first target reference voltage, one of the plurality of different reference voltages at which the first number of erroneous bits of the data that is read reaches a convergence value, wherein the first flash memory page is any one of a plurality of flash memory pages of a flash memory block to be tested; adjusting the first target reference voltage to obtain a plurality of second target reference voltages; and reading data from the plurality of flash memory pages of the flash memory block by using the plurality of second target reference voltages, and taking, as a target reference voltage, one of the plurality of second target reference voltages at which the second number of erroneous bits of the data that is read is the smallest.Type: ApplicationFiled: April 24, 2020Publication date: January 21, 2021Inventors: Tao WEI, Zhengtian FENG, Ke WEI