Abstract: The present invention relates to a benzo seven-membered ring bifunctional compound and an application thereof, and in particular to a compound represented by formula (IV) and a pharmaceutically acceptable salt thereof. The compound can be used for preparing a drug for treating diseases related to an estrogen receptor protein degradation targeting chimera.

Abstract: A shift actuator for a transmission includes a drive assembly coupled with a selector interface. A transmission selector operates between a plurality of transmission settings. A threaded actuator is rotationally operated by the drive assembly. A carriage linearly operates along the threaded actuator to define a plurality of actuator positions that correspond to the transmission settings. An actuator arm extends between the carriage and the transmission selector to translate linear operation of the carriage to rotational operation of the transmission selector.

Abstract: A method and an apparatus for displaying an information flow on a terminal device, an electronic device, a computer-readable storage medium, and a computer program product are provided. An implementation is: in response to detecting an activation operation on an application for displaying the information flow, reproducing, on the terminal device, a first page displayed on the terminal device when the application is last switched to running in the background or closed; and in response to determining that a time interval between the activation operation and the application being last switched to running in the background or closed does not exceed a first threshold, displaying a second page as a continuation of a content entry displayed in the first page, where the second page includes at least one first content entry cached in the terminal device before the activation operation but not displayed in the first page.

Abstract: A method for manufacturing a display panel, a display panel, and a display device are provided. The method includes: forming a plurality of gate lines and a common electrode line pattern on a base substrate; forming an insulating layer on the base substrate on which the plurality of gate lines and the common electrode line pattern are formed; forming a via hole on the insulating layer; and forming a metal conductive pattern on the base substrate on which the insulating layer is formed. The common electrode line and the common electrode connection block located on two sides of a gate line are electrically connected through a bridging structure in a conductive layer made of metal, which reduces the resistance of the bridging structure, so that the voltage uniformity throughout the common electrode line pattern which is bridged through the bridging pattern is high.

Abstract: A method for manufacturing a display panel, a display panel, and a display device are provided. The method includes: forming a plurality of gate lines and a common electrode line pattern on a base substrate; forming an insulating layer on the base substrate on which the plurality of gate lines and the common electrode line pattern are formed; forming a via hole on the insulating layer; and forming a metal conductive pattern on the base substrate on which the insulating layer is formed. The common electrode line and the common electrode connection block located on two sides of a gate line are electrically connected through a bridging structure in a conductive layer made of metal, which reduces the resistance of the bridging structure, so that the voltage uniformity throughout the common electrode line pattern which is bridged through the bridging pattern is high.

Abstract: The present application discloses a display substrate comprising a base substrate; a first electrode on the base substrate; a first insulating layer on a side of the first electrode distal to the base substrate; a thin film transistor on a side of the first insulating layer distal to the first electrode; a second insulating layer on a side of the thin film transistor distal to the first insulating layer; an organic layer on a side of the second insulating layer distal to the thin film transistor; and a second electrode on a side of the organic layer distal to the second insulating layer.

Abstract: A method for producing an array substrate is provided. The method includes: forming metal film layers and patterning the metal film layers to form a plurality rows of gate lines and a plurality columns of data lines crossed to each other in the non-display area and forming thin film transistors; forming a pad part at one end of the gate lines or data lines. The process of producing the pad part includes: forming a first insulation layer on the metal film layers by patterning; forming an etching protection layer, a source and drain metal layer and a second insulation layer sequentially by patterning, wherein the first insulation layer, the etching protection layer, the source and drain metal layer and the second insulation layer form a trapezoid stack.

Abstract: The present disclosure discloses an array substrate including a display area and a data lead area. The display area includes data signal lines and gate lines. The data lead area includes peripheral wirings connecting the data signal lines and wiring terminals. The peripheral wirings include a plurality of metal traces which are corresponding to the data signal lines in a one-to-one manner and manufactured from a same layer as the gate lines. Each of the metal traces is connected to one of the data signal lines which is corresponding to the each of the metal trace.

Abstract: The present application discloses a display substrate comprising a base substrate; a first electrode on the base substrate; a first insulating layer on a side of the first electrode distal to the base substrate; a thin film transistor on a side of the first insulating layer distal to the first electrode; a second insulating layer on a side of the thin film transistor distal to the first insulating layer; an organic layer on a side of the second insulating layer distal to the thin film transistor; and a second electrode on a side of the organic layer distal to the second insulating layer.

Abstract: The present disclosure discloses a thin film transistor comprising: an active layer; an etching barrier layer arranged on the active layer and formed with a plurality of via holes therein; and a source electrode and a drain electrode arranged on the etching barrier layer, wherein the source electrode comprises at least two sub source electrodes and the drain electrode comprises at least two sub drain electrodes; and the sub source electrodes and the sub drain electrodes constitute at least two parallel sub-switches, each of which comprises a sub source electrode and a sub drain electrode, and the sub source electrode and the sub drain electrode are electrically connected to the active layer through the via holes in the etching barrier layer, respectively. The present disclosure further discloses a method of manufacturing a thin film transistor, an array substrate and a display apparatus.

Abstract: The present invention relates to the technical field of display, and in particular to a post spacer, a display panel and a display device. The post spacer includes a support post and a support pillow, wherein the support pillow is formed of a plurality of sub-pillows dispersedly arranged below the bottom of the support post. Since the post spacer is provided with the support pillows dispersedly arranged below the bottom of the support post, the bottom of the support post can be more uniformly stressed, and the support pillow can further provide a certain antiskid effect. Therefore, the post spacer of the present invention has a better supporting effect and can effectively avoid Mura faults.

Abstract: The present disclosure provides a display substrate, its testing method and its manufacturing method. A first testing terminal is connected to a gate electrode of a first TFT, a second testing terminal is connected to a source electrode of the first TFT and a drain electrode of a second TFT, a third testing terminal is connected to a gate electrode of the second TFT, and a fourth testing terminal is connected to a drain electrode of the first TFT and a source electrode of the second TFT.

Abstract: Embodiments of the invention provide a conductive structure, a thin film transistor, an array substrate, and a display device. The conductive structure comprises a copper layer formed of copper or copper alloy; a blocking layer for preventing copper ions of the copper layer from diffusing outward; and a diffusion prevention layer for preventing exterior ions from diffusing to the copper layer and disposed between the copper layer and the blocking layer. The multilayer conductive structure according to an embodiment of the invention can prevent exterior ions from diffusing into a copper layer and prevent copper ions from diffusing outward to reduce ions diffusion that adversely impacts the electricity performance and chemical corrosion resistance of the copper metal layer, and meanwhile can enhance adhesiveness of the conductive structure, which may be helpful for etching/patterning of the multilayer conductive structure.

Abstract: The present invention provides an arrayed substrate, a method for manufacturing the same and a display device. It relates to a field of display technology. The short-circuit defect between the lead wires may be avoided while reducing a spacing between the adjacent two lead lines in a limited space for wiring.

Abstract: The present disclosure discloses a thin film transistor comprising: an active layer; an etching barrier layer arranged on the active layer and formed with a plurality of via holes therein; and a source electrode and a drain electrode arranged on the etching barrier layer, wherein the source electrode comprises at least two sub source electrodes and the drain electrode comprises at least two sub drain electrodes; and the sub source electrodes and the sub drain electrodes constitute at least two parallel sub-switches, each of which comprises a sub source electrode and a sub drain electrode, and the sub source electrode and the sub drain electrode are electrically connected to the active layer through the via holes in the etching barrier layer, respectively. The present disclosure further discloses a method of manufacturing a thin film transistor, an array substrate and a display apparatus.

Abstract: A method for producing an array substrate is provided. The method includes: forming metal film layers and patterning the metal film layers to form a plurality rows of gate lines and a plurality columns of data lines crossed to each other in the non-display area and forming thin film transistors; forming a pad part at one end of the gate lines or data lines. The process of producing the pad part includes: forming a first insulation layer on the metal film layers by patterning; forming an etching protection layer, a source and drain metal layer and a second insulation layer sequentially by patterning, wherein the first insulation layer, the etching protection layer, the source and drain metal layer and the second insulation layer form a trapezoid stack.

Abstract: The present disclosure provides a display substrate, its testing method and its manufacturing method. A first testing terminal is connected to a gate electrode of a first TFT, a second testing terminal is connected to a source electrode of the first TFT and a drain electrode of a second TFT, a third testing terminal is connected to a gate electrode of the second TFT, and a fourth testing terminal is connected to a drain electrode of the first TFT and a source electrode of the second TFT.

Abstract: An array substrate comprising display areas and non-display areas is provided. The non-display area comprises an area in which a plurality of gate lines and a plurality of data lines crossed to each other are located and an area in which thin film transistors are located, the gate lines and the data lines being formed by patterning metal film layers which are formed in the area by magnetron sputtering targets spaced to each other; and wherein a pad part is formed in an area of the non-display areas corresponding to the spacing areas between the targets, a sum of thickness of the metal film layer foamed in the areas corresponding to the spacing areas between the targets and the thickness of the pad part being equal to the thickness of the metal film layer formed in the areas facing the targets.

Abstract: The present invention provides an arrayed substrate, a method for manufacturing the same and a display device. It relates to a field of display technology. The short-circuit defect between the lead wires may be avoided while reducing a spacing between the adjacent two lead lines in a limited space for wiring.