Patents by Inventor Zhengyi XIN

Zhengyi XIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BISS protocol data decoding method and interface system
    Patent number: 10833805
    Abstract: There are provided a method and an interface system for Bidirectional Synchronous Serial (BISS) protocol data decoding. The method includes: an MA drive module receiving an enable signal en and transmitting an MA clock signal to an SL receiving module, and then the SL receiving module detecting a trigger signal of SL; when a start bit of the SL is detected by the SL receiving module, the SL receiving module reading SL data; after the SL data is read, the SL receiving module transmitting a done signal to the MA drive module to stop operation of the MA drive module and transmitting a did signal to a CRC check module; and after the did signal is received by the CRC check module, the CRC check module performing CRC check on the SL data and outputting a correct position value after the check is completed.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: November 10, 2020
    Assignee: GUANGDONG UNIVERSITY OF TECHNOLOGY
    Inventors: Han Wang, Fangjian Zhang, Xin Chen, Xindu Chen, Nian Cai, Yunbo He, Yixiang Zhao, Canran Lin, Zhengyi Xin
  • BISS PROTOCOL DATA DECODING METHOD AND INTERFACE SYSTEM
    Publication number: 20190238269
    Abstract: There are provided a method and an interface system for Bidirectional Synchronous Serial (BISS) protocol data decoding. The method includes: an MA drive module receiving an enable signal en and transmitting an MA clock signal to an SL receiving module, and then the SL receiving module detecting a trigger signal of SL; when a start bit of the SL is detected by the SL receiving module, the SL receiving module reading SL data; after the SL data is read, the SL receiving module transmitting a done signal to the MA drive module to stop operation of the MA drive module and transmitting a did signal to a CRC check module; and after the did signal is received by the CRC check module, the CRC check module performing CRC check on the SL data and outputting a correct position value after the check is completed.
    Type: Application
    Filed: March 14, 2018
    Publication date: August 1, 2019
    Applicant: GUANGDONG UNIVERSITY OF TECHNOLOGY
    Inventors: Han WANG, Fangjian ZHANG, Xin CHEN, Xindu CHEN, Nian CAI, Yunbo HE, Yixiang ZHAO, Canran LIN, Zhengyi XIN