Patents by Inventor Zhengyu Zhu

Zhengyu Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200331088
    Abstract: The present invention provides a repairing method for a hydraulic-end valve cage cavity. First, a to-be-repaired hydraulic-end valve cage cavity is mechanically processed to reserve a unilateral repair size of the cavity; shot blasting and cleaning are performed on the cavity; basic repairing is performed on the cavity to form a backing welding layer, and welding and cladding repairing are performed on the backing welding layer for n layers, to form n repair-welding layers; and finally machine finishing is performed on the cavity having undergone welding repair. The repairing method is also applicable to repairing of a plunger-end seal hole. The repairing method provided in the present invention is simple and is easy to be controlled, and a repaired hydraulic-end valve cage and plunger-end seal hole can be used in on-site fracturing construction in a condition of 50 MPa to 100 MPa for 200 h.
    Type: Application
    Filed: September 30, 2018
    Publication date: October 22, 2020
    Inventors: He Wang, Yang Li, Pinhui Fan, Zhengyu Zhu, Haikun Feng
  • Patent number: 9147665
    Abstract: Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using a boundary feature(s) containing a bond wire to define a perimeter on the die attach pad, depositing a conductive material (such as solder) within the perimeter, and then attaching a die containing an integrated circuit device to the die attach pad by using the conductive material. The boundary feature(s) allow an increased thickness of conductive material to be used, resulting in increased bond line thickness and increasing the durability and performance of the resulting semiconductor package. Other embodiments are described.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: September 29, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Zhengyu Zhu, Yi Li, FangFang Yang
  • Publication number: 20120232944
    Abstract: Methods, apparatus, and computer readable media with executable instructions stored thereon for optimizing resource skill compliance are provided. Example methods of the present disclosure can include identifying jobs, skills corresponding to the jobs, and resources corresponding to the skills. A job skill level is associated with each skill of each job, and a resource skill level is associated with each skill of each resource. An individual skill compliance is determined by computer for each skill of each resource with respect to each skill of each job based on the resource skill level relative to the job skill level. A resource skill compliance is determined by computer for each resource with respect to each job as a total of the individual skill level compliances for each skill corresponding to each job, and resources are assigned by a computer to jobs in a manner that optimizes a total of the resource skill compliances for those resources assigned to jobs.
    Type: Application
    Filed: March 11, 2011
    Publication date: September 13, 2012
    Inventors: Zhengyu Zhu, Cipriano A. Santos, Wei-Hong Wang, Maria Teresa Gonzalez Diaz
  • Publication number: 20110037153
    Abstract: Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using a boundary feature(s) containing a bond wire to define a perimeter on the die attach pad, depositing a conductive material (such as solder) within the perimeter, and then attaching a die containing an integrated circuit device to the die attach pad by using the conductive material. The boundary feature(s) allow an increased thickness of conductive material to be used, resulting in increased bond line thickness and increasing the durability and performance of the resulting semiconductor package. Other embodiments are described.
    Type: Application
    Filed: September 22, 2010
    Publication date: February 17, 2011
    Inventors: Zhengyu Zhu, Yi Li, FangFang Yang
  • Patent number: 7825501
    Abstract: Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using boundary features to define a perimeter on the die pad, depositing a conductive material (such as solder) within the perimeter, and then bonding a die containing an integrated circuit to the die pad by using the conductive material. The boundary features allow an increased thickness of conductive material to be used, resulting in an increased bond line thickness and increasing the durability and performance of the resulting semiconductor device.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: November 2, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Zhengyu Zhu, Yi Li, FangFang Yang
  • Patent number: 7589338
    Abstract: An optocoupler package is disclosed. The package includes a substrate comprising a substrate surface, a first device, and a clip structure attached to the first device. The clip structure and the first device are mounted on the substrate, and the first device is oriented at an angle with respect to the substrate surface. A second device is mounted on the substrate, where the first device is capable of communicating with the second device.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: September 15, 2009
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Yong Liu, Zhengyu Zhu, Zhongfa Yuan
  • Publication number: 20090140179
    Abstract: An optocoupler package is disclosed. The package includes a substrate comprising a substrate surface, a first device, and a clip structure attached to the first device. The clip structure and the first device are mounted on the substrate, and the first device is oriented at an angle with respect to the substrate surface. A second device is mounted on the substrate, where the first device is capable of communicating with the second device.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 4, 2009
    Inventors: Yong Liu, Zhengyu Zhu, Zhongfa Yuan
  • Publication number: 20090115039
    Abstract: Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using boundary features to define a perimeter on the die pad, depositing a conductive material (such as solder) within the perimeter, and then bonding a die containing an integrated circuit to the die pad by using the conductive material. The boundary features allow an increased thickness of conductive material to be used, resulting in an increased bond line thickness and increasing the durability and performance of the resulting semiconductor device.
    Type: Application
    Filed: November 6, 2007
    Publication date: May 7, 2009
    Inventors: Zhengyu Zhu, Yi Li, FangFang Yang