Patents by Inventor Zhenhai Zhu

Zhenhai Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SIGNAL COMMUNICATION BASED ON LEVITATED PARTICLE
    Publication number: 20250030509
    Abstract: The present disclosure provides a method and device for performing signal communication based on a levitated particle. In one example, the method includes: preparing a levitated state of the particle; regulating and measuring a net charge quantity carried by the levitated particle; calibrating electromagnetic response characteristics of the levitated particle; applying an electromagnetic communication signal; obtaining and demodulating the electromagnetic communication signal.
    Type: Application
    Filed: May 25, 2023
    Publication date: January 23, 2025
    Applicants: ZHEJIANG LAB, ZHEJIANG UNIVERSITY
    Inventors: Huizhu HU, Zhenhai FU, Xiaowen GAO, Xingfan CHEN, Nan LI, Cheng LIU, Zhiming CHEN, Jinsheng XU, Shaochong ZHU, Yingying WANG, Peitong HE
  • Method, system, and computer program product for lithography simulation in electronic design automation
    Patent number: 8209161
    Abstract: Disclosed are improved methods, systems, and computer program products for lithographic simulation of an electronic circuit design.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: June 26, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventor: Zhenhai Zhu
  • Method for reducing model order exploiting sparsity in electronic design automation and analysis
    Patent number: 7996193
    Abstract: A method for reducing the order of system models exploiting sparsity is disclosed. According to one embodiment, a computer-implemented method receives a system model having a first system order. The system model contains a plurality of system nodes, a plurality of system matrices. The system nodes are reordered and a reduced order system is constructed by a matrix decomposition (e.g., Cholesky or LU decomposition) on an expansion frequency without calculating a projection matrix. The reduced order system model has a lower system order than the original system model.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: August 9, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Zuochang Ye, Zhenhai Zhu, Joel Phillips
  • Parasitic effects analysis of circuit structures
    Patent number: 7853910
    Abstract: Method, system, and computer program product for analyzing circuit structures for parasitic effects are provided. Data from a previous parasitic effect analysis of a circuit structure is used to perform parasitic effect analysis on another circuit structure even when the circuit structures are not identical, provided the circuit structures are similar.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: December 14, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Zhenhai Zhu, Joel Phillips, Zuo-Chang Ye
  • METHOD, SYSTEM, AND COMPUTER PROGRAM PRODCUT FOR LITHOGRAPHY SIMULATION IN ELECTRONIC DESIGN AUTOMATION
    Publication number: 20100169060
    Abstract: Disclosed are improved methods, systems, and computer program products for lithographic simulation of an electronic circuit design.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventor: Zhenhai Zhu
  • METHOD FOR REDUCING MODEL ORDER EXPLOITING SPARSITY
    Publication number: 20090265150
    Abstract: A method for reducing the order of system models exploiting sparsity is disclosed. According to one embodiment, a computer-implemented method receives a system model having a first system order. The system model contains a plurality of system nodes, a plurality of system matrices. The system nodes are reordered and a reduced order system is constructed by a matrix decomposition (e.g., Cholesky or LU decomposition) on an expansion frequency without calculating a projection matrix. The reduced order system model has a lower system order than the original system model.
    Type: Application
    Filed: April 21, 2008
    Publication date: October 22, 2009
    Inventors: ZUOCHANG YE, Zhenhai Zhu, Joel Phillips