Abstract: A display panel, a manufacturing method thereof, a display device and a mould are disclosed. The display panel includes a first substrate and a second substrate disposed opposite to each other; a sealant disposed in a non-display region between the first substrate and the second substrate; and a protection structure disposed on a side surface of the display panel, wherein a material of forming the protection structure is an insulating material with viscosity; and a height of the protection structure in a direction perpendicular to surfaces of the first substrate and the second substrate is not greater than a thickness of the display panel.

Abstract: The present disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes an active layer, a gate insulating layer and a gate electrode layer formed sequentially on a base substrate. The active layer includes a first heavily-doped region, a first lightly-doped region, a first non-doped region, a second lightly-doped region, a second non-doped region, a third lightly-doped region and a second heavily-doped region which are sequentially arranged in a horizontal direction.

Abstract: A manufacturing method of an alignment film and a device for manufacturing an alignment film are provided, and the manufacturing method of the alignment film includes: irradiating a substrate with excimer ultraviolet (EUV) light; performing a cleaning process on the substrate which has been irradiated by the EUV light; and forming an alignment film on the substrate which has been performed the cleaning process. A substrate is irradiated with EUV light before performing a cleaning process on the substrate, and the organic contaminants which are difficult to be washed off on the surface of the substrate can be decomposed by the irradiating of the EUV light, therefore the coating defect is reduced.

Abstract: The present disclosure provides an array substrate and a capacitive in-cell touch panel with the array substrate. The array substrate includes a common electrode layer which is partitioned into a plurality of touch driving electrodes and a plurality of common electrodes arranged alternately. Each touch driving electrode is configured to be applied with a common electrode signal and a touch scanning signal in a time-division manner. Each touch driving electrode includes a plurality of touch driving sub-electrodes spaced apart from each other in an extension direction of the touch driving electrode, and metal wires configured to connect the adjacent touch driving sub-electrodes.

Abstract: The invention provides a method for manufacturing an array substrate which comprises a gate driving circuit including a plurality of thin film transistors and connection gate lines each connected between gates of two adjacent thin film transistors, the method comprises steps of: step S1, forming a pattern including the gates of the thin film transistors and the connection gate lines on a base; step S2, forming a gate insulation layer above the pattern including the gates of the thin film transistors and the connection gate lines; step S3, forming a pattern including a gate line protecting layer on the gate insulation layer, wherein the gate line protecting layer is above the connection gate lines; and step S4, forming a pattern including the sources and drains of the thin film transistors. The invention also provides an array substrate which is manufactured by above method, and a display device comprising the same.

Abstract: A manufacture method of a via hole for a display panel, a manufacture method of a display panel, and a display panel are provided. During forming the via hole, a top film layer in an area to be formed with a via hole over a circuit pattern is etched under a first etching condition according to a slope angle as required; and a remaining portion in the area to be formed with a via hole is etched under a second etching condition according to a selection ratio as required, so as to form the via hole finally. A problem in one-step etching process that the slope angle and the selection ratio cannot be set flexibly is avoided.

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a display area and a non-display area. The non-display area includes at least one light sensor each including a light blocking layer on a substrate and for blocking light emitted from a backlight source; an insulating layer on the light blocking layer; a amorphous silicon layer on the insulating layer at a location corresponding to the light blocking layer and for sensing external light; an input electrode and an output electrode on the amorphous silicon layer and not contacting each other. The input electrode and the output electrode both contact the amorphous silicon layer, a part of the amorphous silicon layer between the input electrode and the output electrode forms a conductive channel. The output electrode is connected with a photoelectric detection circuit for inputting drain current generated by the conductive channel into the photoelectric detection circuit.

Abstract: An Oxide TFT, a preparation method thereof, an array substrate and a display device are described. The method includes forming a gate electrode, a gate insulating layer, a channel layer, a barrier layer, as well as a source electrode and a drain electrode on a substrate; the channel layer is formed by depositing an amorphous oxide semiconductor film in a first mixed gas containing H2, Ar and O2. By depositing a channel layer in a first mixed gas containing H2, Ar and O2, the hysteresis phenomenon of the TFT can be mitigated effectively to improve the display quality of the display panel.

Abstract: The present disclosure provides a half tone mask plate used to manufacture an active layer pattern as well as a source electrode pattern, a drain electrode pattern and a data line pattern located on the active layer pattern included in the array substrate. A surface of the array substrate includes a first region corresponding to the source electrode pattern, the drain electrode pattern and the data line pattern, a second region corresponding to a region of the active layer pattern located between the source electrode pattern and the drain electrode pattern, as well as a third region in addition to the first region and the second region; the half tone mask plate includes a semi-transparent region corresponding to the second region and a partial region of the third region.

Abstract: The technical disclosure relates to a thin film transistor and a manufacturing method thereof, an array substrate and a display device. The thin film transistor comprises a base substrate, a gate electrode, an active layer, source/drain electrodes, a pixel electrode and one or more insulating layers, wherein at least one of the insulating layers comprises a bottom insulating sub-layer and a top insulating sub-layer, the top insulating sub-layer having a hydrogen content higher than that of the bottom insulating sub-layer.

Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of the array substrate includes depositing an amorphous silicon thin film layer on a base substrate; performing a patterning process on the amorphous silicon thin film layer, so as to form a pattern with multiple small pores at a surface of the amorphous silicon thin film layer. With this method, when a laser annealing treatment of amorphous silicon is performed, the molten silicon after melting fills the space of small pores at a surface of the amorphous silicon thin film layer firstly, thereby avoiding forming a protruded grain boundary that is produced because the excess volume of polysilicon is squeezed.

Abstract: An embodiment of the present invention provides a manufacturing method of an amorphous-silicon flat-panel X-ray sensor; the method reduces the number of mask plates to be used, simplifies the production processes, saves production costs, while also improving the product yield. The manufacturing method comprises: on a substrate, after a gate scan line is formed, forming a data line, a TFT switch element and a photosensitive element through one patterning process, wherein on the mask plate used in the patterning process, a region corresponding to a channel of the TFT switch element is semi-transmissive, whereas regions respectively corresponding to the data line, the photosensitive element and the portion of the TFT switch element other than the channel thereof are non-transmissive; thereafter, on the substrate formed with the TFT switch element and the photosensitive element, a passivation layer and a bias line are formed.

Abstract: Embodiments of the invention disclose an array substrate and a manufacturing method thereof and a liquid crystal display. In the array substrate, an additional electrode is formed above a gate line, the additional electrode and the gate line are spaced from each other by a gate insulation layer, and the additional electrode is connected electrically with the common electrode line; pixel electrode extends to over the additional electrode and is overlapped with the additional electrode, the overlapped portion of the pixel electrode and both the additional electrode and the common electrode line forms a storage capacitor. The liquid crystal display according to the embodiment of the invention comprises the above array substrate.

Abstract: An amorphous-silicon photoelectric device and a fabricating method thereof are disclosed. The amorphous-silicon photoelectric device includes: a substrate; a thin-film transistor and a photosensor with the photodiode structure, which are provided at different positions on the substrate; and a contact layer; in which the contact layer is located below the photosensor, and the contact layer is partially covered by the photosensor, moreover, the contact layer and the gate-electrode layer in the thin-film transistor are provided in a same layer and of a same material. According to the technical solutions of the present disclosure, the fabricating procedure of an a-Si photoelectric device can be simplified, thereby improving the fabrication efficiency and reducing costs.

Abstract: A method of manufacturing a thin film transistor flat sensor that includes depositing a first metal film on a substrate and forming a common electrode on the substrate with one patterning process; successively depositing an insulating film and a second metal film on the substrate having the common electrode formed thereon, and forming a gate electrode by applying one pattering process to the second metal film; applying one patterning process to the deposited insulating film to form a common electrode insulating layer, wherein a first via hole is formed in the common electrode insulating layer at a location corresponding to the common electrode; depositing a transparent conductive film on the substrate having the common electrode, and forming a first conductive film layer, acting as one polar plate of a storage capacitor, on the common electrode and the gate electrode with one patterning process.

Abstract: A method for manufacturing an array substrate which includes: depositing a gate metal film on a base substrate, and forming a first pattern including the gate electrode by a first patterning process; depositing a gate insulating film, a first transparent conductive film, a source/drain metal film and a doped a-Si film sequentially, and forming a second pattern including the pixel electrode, the source electrode, the drain electrode and a doped semiconductor layer by a second patterning process; depositing an a-Si film, and forming a third pattern including a TFT channel, the semiconductor layer and a gate insulating layer via-hole by a third patterning process; depositing a passivation layer film, and forming a fourth pattern including a passivation layer via-hole by a fourth patterning process, the passivation layer via-hole being arranged at a position corresponding to the gate insulating layer via-hole; and depositing a second transparent conductive film on the base substrate with the fourth pattern, and f

Abstract: The invention relates to the field of display technologies, and discloses a method for producing a via, a method for producing an array substrate, an array substrate and a display device to prevent a chamfer from being formed in producing the via, to promote the product quality and improve the display effect of the display device. The method for producing a via comprises: employing a first etching process to partially etch a top film layer in an area that needs to form a via above an electrode, wherein the vertical etching amount achieved by employing the first etching process is less than the thickness of the top film layer; and employing a second etching process for which the vertical etching rate is larger than the lateral etching rate to etch the remaining part in the area that needs to form a via, until the electrode is exposed.

Abstract: The present invention provides a color filter substrate, a display device and a detection method thereof, aims to solve the problems of difficulty in failure positioning and low detection efficiency in existing display panels. The color filter substrate comprises a plurality of sub-pixels arranged in an array, each of the sub-pixels is provided with a color filter, and at least a part of columns of sub-pixels are marked column of sub-pixels. The shapes of the color filters of a part of sub-pixels of the marked column of sub-pixels are different from those of the remaining sub-pixels. The display device comprises the above-mentioned color filter substrate. The color filter substrate can be used in the display device, particularly suitable for the display device which adopts double side GOA circuits.

Abstract: The present invention discloses an array substrate and a manufacturing method thereof, and a display device, and relates to the field of display technology, in order to reduce the leakage current of the TFT, improve the stability of the TFT, and enhance the display effect of the display device. The array substrate comprises: a transparent substrate, a TFT on the transparent substrate, a first passivation layer covering the TFT, a first transparent electrode on a surface of the first passivation layer, and a light blocking structure for preventing light transmission provided at a position, corresponding to a channel of the TFT, on a side of the TFT away from the transparent substrate.

Abstract: The present disclosure provides a TFT, a method for manufacturing the same, an array substrate and a display device, so as to effectively reduce a TFT edge leakage current IOFF (edge). The TFT includes an active layer and a silicon oxide layer arranged at a lateral side of the active layer.