Abstract: A high electron mobility transistor (HEMT) device including a substrate and a semiconductor stack is provided. The semiconductor stack comprises a lower channel layer, an insertion layer (ISL) positioned above the lower channel layer for confining electrons in the lower channel layer, an upper channel layer, an interface enhancement layer (IEL) positioned above the upper channel layer for confining the electrons in the upper channel layer, and a barrier layer positioned above the IEL. The ISL and the IEL are formed above the lower channel layer and the upper channel layer respectively to create a first and second wide bandgap heterojunction. The ISL and the IEL each provides a higher energy band with a potential barrier with respect to the electrons generated between the ISL and the lower channel layer, and between the IEL and the upper channel layer. The potential barrier prevents or reduces a flow of hot electrons.

Abstract: Provided herein are a wide-bandgap semiconductor bipolar charge trapping (BCT) non-volatile memory structure with only one single insulating layer and a fabrication method thereof. Monolithically integrated enhancement-mode (E-mode) n-channel and p-channel field effect transistors (n-FETs and p-FETs) for gallium nitride (GaN)-based complementary logic (CL) gates based on the proposed memory structure, together with a fabrication method thereof in a single process run and various logic circuits incorporating one or more of the GaN-based CL gates, are also provided herein.